From patchwork Wed Aug 3 03:10:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 655239 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3s3yw00fGhz9s5g for ; Wed, 3 Aug 2016 13:18:56 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=nN80Q0Bv; dkim-atps=neutral Received: from localhost ([::1]:59951 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUmhp-0004Ac-UB for incoming@patchwork.ozlabs.org; Tue, 02 Aug 2016 23:18:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48774) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUmaE-0005oK-HU for qemu-devel@nongnu.org; Tue, 02 Aug 2016 23:11:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bUmaD-0006uz-3Z for qemu-devel@nongnu.org; Tue, 02 Aug 2016 23:11:02 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:36652) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUmaC-0006uu-Oj for qemu-devel@nongnu.org; Tue, 02 Aug 2016 23:11:01 -0400 Received: by mail-pf0-x244.google.com with SMTP id y134so13681336pfg.3 for ; Tue, 02 Aug 2016 20:11:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZR6Y9McZo5NsPkqa+xtF8PvivnG9mfxvaIQjgLHVfYY=; b=nN80Q0BvEjQXyqQYplbENC+Wmtxz+D3Ic36ACD3WJdy95cr82cEJlj7PBL3J4G0/xN Emruv2s8paSkWXdVIIU+pIA/4QWuCpDazvbxrhZzjdRIVSkFitKSLlSuKs0bKLacABTG XF2eU79f93JD/4srToTOaLHuFFSN+7Jjl9OWG2uSd2z9F2/6WcwYjbNmonN1wWpFzjkg Cw91ZLkX0VxqXkLSd7xZ0x4M+e7sFj9n2uIkZvPwRV3EPyxhSOSsM5n0IWJLIGbOEaGp GIh1T7eRqCCIHLQy31xMpjLQrl4E8rnlLr5uhVtclIjUN4gefJU86iSQj+7tKbpIO05H Zp6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZR6Y9McZo5NsPkqa+xtF8PvivnG9mfxvaIQjgLHVfYY=; b=LRWrKxinZ+xBjP792E84fyd0ZsQPrRusCbhWMC/Fy2Rnmf49Jm1wKlGyJTdEYrEoP4 sUKQv11vQEU0H0J/x+X55DyHYFJL3VD33tPKqu0sMw9bPW/TPsRRVpyHi7Or3JaJO8Dw 4O98AmJ9x7o8/aA8zf4xsXgEFiJGofmscFj/R2+8Rs5x1GzjEvXF8Dy/Pq7O+FZUmbM6 8QfXJsMvJAh4Z7RUnsKoThj4bcTVWACg6RDdSpkR1kQGaFnF0U+f9iwUlugD6dDWLFhT cYlEP9Xj/wkBgu4yIuaLSvFnrAWdfTbuiW4/Ze/1q8aAXSS4WA+ZHSGjSVj9qkiwWoyz Cf8g== X-Gm-Message-State: AEkoouuHtHy4FYykYSfQDcU8E46zNvruOLqXu3Cl+Cvt3ApRfDsBSS2qYq/VnddbWTTYng== X-Received: by 10.98.47.132 with SMTP id v126mr112911733pfv.152.1470193860095; Tue, 02 Aug 2016 20:11:00 -0700 (PDT) Received: from localhost ([2601:646:8581:937e:fc58:edc5:1254:cc96]) by smtp.gmail.com with ESMTPSA id n5sm7963195pai.11.2016.08.02.20.10.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Aug 2016 20:10:59 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 2 Aug 2016 20:10:58 -0700 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PATCH v6 5/8] irq: Add a new irq device that allows the ORing of lines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, konstanty@ieee.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alistair Francis --- As the migration framework is not included in user mode this needs to be a new file. V6: - Make the OR IRQ device a TYPE_DEVICE - Add vmstate hw/core/Makefile.objs | 1 + hw/core/irq.c | 1 + hw/core/or-irq.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/hw/irq.h | 15 ++++++++ 4 files changed, 119 insertions(+) create mode 100644 hw/core/or-irq.c diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs index cfd4840..b47241b 100644 --- a/hw/core/Makefile.objs +++ b/hw/core/Makefile.objs @@ -16,4 +16,5 @@ common-obj-$(CONFIG_SOFTMMU) += null-machine.o common-obj-$(CONFIG_SOFTMMU) += loader.o common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o common-obj-$(CONFIG_SOFTMMU) += register.o +common-obj-$(CONFIG_SOFTMMU) += or-irq.o common-obj-$(CONFIG_PLATFORM_BUS) += platform-bus.o diff --git a/hw/core/irq.c b/hw/core/irq.c index 49ff2e6..dc874cc 100644 --- a/hw/core/irq.c +++ b/hw/core/irq.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "hw/irq.h" +#include "hw/sysbus.h" #include "qom/object.h" #define IRQ(obj) OBJECT_CHECK(struct IRQState, (obj), TYPE_IRQ) diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c new file mode 100644 index 0000000..2bd181b --- /dev/null +++ b/hw/core/or-irq.c @@ -0,0 +1,102 @@ +/* + * QEMU IRQ/GPIO common code. + * + * Copyright (c) 2016 Alistair Francis . + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "hw/irq.h" +#include "hw/sysbus.h" +#include "qom/object.h" + +#define OR_IRQ(obj) OBJECT_CHECK(qemu_or_irq, (obj), TYPE_OR_IRQ) + +struct OrIRQState { + Object parent_obj; + + qemu_irq in_irq; + qemu_irq *out_irqs; + int16_t levels[MAX_OR_LINES]; + int n; +}; + +static void or_irq_handler(void *opaque, int n, int level) +{ + qemu_or_irq *or_irq = OR_IRQ(opaque); + int or_level = 0; + int i; + + or_irq->levels[n] = level; + + for (i = 0; i < or_irq->n; i++) { + or_level |= or_irq->levels[i]; + } + + qemu_set_irq(or_irq->in_irq, or_level); +} + +qemu_irq *qemu_allocate_or_irqs(qemu_irq in_irq, int n) +{ + qemu_or_irq *or_irq; + + assert(n < MAX_OR_LINES); + + or_irq = OR_IRQ(object_new(TYPE_OR_IRQ)); + object_initialize(or_irq, sizeof(qemu_or_irq), + TYPE_OR_IRQ); + + or_irq->out_irqs = qemu_allocate_irqs(or_irq_handler, or_irq, n); + or_irq->in_irq = in_irq; + or_irq->n = n; + + return or_irq->out_irqs; +} + +static const VMStateDescription vmstate_or_irq = { + .name = TYPE_OR_IRQ, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_INT16_ARRAY(levels, qemu_or_irq, MAX_OR_LINES), + VMSTATE_END_OF_LIST(), + } +}; + +static void or_irq_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->vmsd = &vmstate_or_irq; +} + +static const TypeInfo or_irq_type_info = { + .name = TYPE_OR_IRQ, + .parent = TYPE_DEVICE, + .instance_size = sizeof(qemu_or_irq), + .class_init = or_irq_class_init, +}; + +static void or_irq_register_types(void) +{ + type_register_static(&or_irq_type_info); +} + +type_init(or_irq_register_types) diff --git a/include/hw/irq.h b/include/hw/irq.h index 4c4c2ea..5e8a3b6 100644 --- a/include/hw/irq.h +++ b/include/hw/irq.h @@ -4,8 +4,12 @@ /* Generic IRQ/GPIO pin infrastructure. */ #define TYPE_IRQ "irq" +#define TYPE_OR_IRQ "or-irq" + +#define MAX_OR_LINES 16 typedef struct IRQState *qemu_irq; +typedef struct OrIRQState qemu_or_irq; typedef void (*qemu_irq_handler)(void *opaque, int n, int level); @@ -38,6 +42,17 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); */ qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n); +/* + * qemu_allocate_or_irqs + * @in_irq: An input IRQ. It will be the result of the @out_irqs ORed together + * @n: The number of interrupt lines that should be ORed together + * + * returns: An array of interrupts that should be ORed together + * + * OR all of the interrupts returned in the array into a single @in_irq. + */ +qemu_irq *qemu_allocate_or_irqs(qemu_irq in_irq, int n); + /* Extends an Array of IRQs. Old IRQs have their handlers and opaque data * preserved. New IRQs are assigned the argument handler and opaque data. */