From patchwork Sat Feb 25 18:31:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 732466 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vW5fN2N0rz9s2P for ; Sun, 26 Feb 2017 11:42:52 +1100 (AEDT) Received: from localhost ([::1]:44801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1chmvJ-0005Gp-OM for incoming@patchwork.ozlabs.org; Sat, 25 Feb 2017 19:42:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42500) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1chmkY-0001Dq-CD for qemu-devel@nongnu.org; Sat, 25 Feb 2017 19:31:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1chmkV-0005uz-BM for qemu-devel@nongnu.org; Sat, 25 Feb 2017 19:31:42 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:32624) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1chmkV-0005tM-05; Sat, 25 Feb 2017 19:31:39 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 49196745970; Sun, 26 Feb 2017 01:31:30 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 79BB8745962; Sun, 26 Feb 2017 01:31:29 +0100 (CET) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Sat, 25 Feb 2017 19:31:24 +0100 To: qemu-devel@nongnu.org, qemu-trivial@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH v2 05/14] sm501: Add emulation of chip connected via PCI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Only the display controller part is created automatically on PCI Signed-off-by: BALATON Zoltan --- v2: Split off removing dependency on base address to separate patch hw/display/sm501.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 1cda127..d9219bd 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -31,6 +31,7 @@ #include "ui/console.h" #include "hw/devices.h" #include "hw/sysbus.h" +#include "hw/pci/pci.h" #include "qemu/range.h" #include "ui/pixel_ops.h" #include "exec/address-spaces.h" @@ -1507,9 +1508,60 @@ static const TypeInfo sm501_sysbus_info = { .class_init = sm501_sysbus_class_init, }; +#define TYPE_PCI_SM501 "sm501" +#define PCI_SM501(obj) OBJECT_CHECK(SM501PCIState, (obj), TYPE_PCI_SM501) + +typedef struct { + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + SM501State state; + uint32_t vram_size; +} SM501PCIState; + +static void sm501_realize_pci(PCIDevice *dev, Error **errp) +{ + SM501PCIState *s = PCI_SM501(dev); + + sm501_init(&s->state, DEVICE(dev), s->vram_size); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, + &s->state.local_mem_region); + pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, + &s->state.mmio_region); +} + +static Property sm501_pci_properties[] = { + DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, + 64 * 1024 * 1024), + DEFINE_PROP_END_OF_LIST(), +}; + +static void sm501_pci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = sm501_realize_pci; + k->vendor_id = 0x126f; + k->device_id = 0x0501; + k->class_id = PCI_CLASS_DISPLAY_OTHER; + set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); + dc->desc = "SM501 Display Controller"; + dc->props = sm501_pci_properties; + dc->hotpluggable = false; +} + +static const TypeInfo sm501_pci_info = { + .name = TYPE_PCI_SM501, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(SM501PCIState), + .class_init = sm501_pci_class_init, +}; + static void sm501_register_types(void) { type_register_static(&sm501_sysbus_info); + type_register_static(&sm501_pci_info); } type_init(sm501_register_types)