From patchwork Wed Sep 28 11:00:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 116781 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 004A5B6F8E for ; Wed, 28 Sep 2011 22:31:59 +1000 (EST) Received: from localhost ([::1]:34793 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8ruO-0008CG-KL for incoming@patchwork.ozlabs.org; Wed, 28 Sep 2011 07:02:36 -0400 Received: from eggs.gnu.org ([140.186.70.92]:46977) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rtC-0004wV-Fl for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R8rt2-0004FG-ID for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:22 -0400 Received: from david.siemens.de ([192.35.17.14]:33128) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R8rt2-0004Dn-7h for qemu-devel@nongnu.org; Wed, 28 Sep 2011 07:01:12 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by david.siemens.de (8.13.6/8.13.6) with ESMTP id p8SB1ABl013453; Wed, 28 Sep 2011 13:01:10 +0200 Received: from mchn199C.mchp.siemens.de ([139.25.109.49]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p8SB18Vx017664; Wed, 28 Sep 2011 13:01:10 +0200 From: Jan Kiszka To: Anthony Liguori , qemu-devel Date: Wed, 28 Sep 2011 13:00:57 +0200 Message-Id: X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.14 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As we clearly modify the PIC state on pic_reset, we also have to update the IRQ output. This only happened on init so far. Apply this consistently. Signed-off-by: Jan Kiszka --- hw/i8259.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/hw/i8259.c b/hw/i8259.c index b7a011f..3498c6b 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -283,6 +283,7 @@ static void pic_reset(void *opaque) s->init4 = 0; s->single_mode = 0; /* Note: ELCR is not reset */ + pic_update_irq(s->pics_state); } static void pic_ioport_write(void *opaque, target_phys_addr_t addr64, @@ -298,8 +299,6 @@ static void pic_ioport_write(void *opaque, target_phys_addr_t addr64, if (val & 0x10) { /* init */ pic_reset(s); - /* deassert a pending interrupt */ - qemu_irq_lower(s->pics_state->pics[0].int_out); s->init_state = 1; s->init4 = val & 1; s->single_mode = val & 2;