From patchwork Fri Apr 26 03:24:42 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hu Tao X-Patchwork-Id: 239642 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DD5F82C00E9 for ; Fri, 26 Apr 2013 13:28:02 +1000 (EST) Received: from localhost ([::1]:47775 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVZKL-0001ng-2w for incoming@patchwork.ozlabs.org; Thu, 25 Apr 2013 23:28:01 -0400 Received: from eggs.gnu.org ([208.118.235.92]:57400) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVZI0-00072K-FH for qemu-devel@nongnu.org; Thu, 25 Apr 2013 23:25:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UVZHu-00039k-21 for qemu-devel@nongnu.org; Thu, 25 Apr 2013 23:25:36 -0400 Received: from [222.73.24.84] (port=24315 helo=song.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UVZHt-00038u-EW for qemu-devel@nongnu.org; Thu, 25 Apr 2013 23:25:29 -0400 X-IronPort-AV: E=Sophos;i="4.87,555,1363104000"; d="scan'208";a="7142959" Received: from unknown (HELO tang.cn.fujitsu.com) ([10.167.250.3]) by song.cn.fujitsu.com with ESMTP; 26 Apr 2013 11:22:35 +0800 Received: from fnstmail02.fnst.cn.fujitsu.com (tang.cn.fujitsu.com [127.0.0.1]) by tang.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id r3Q3PIWS016211; Fri, 26 Apr 2013 11:25:19 +0800 Received: from localhost.localdomain ([10.167.233.156]) by fnstmail02.fnst.cn.fujitsu.com (Lotus Domino Release 8.5.3) with ESMTP id 2013042611234252-844251 ; Fri, 26 Apr 2013 11:23:42 +0800 From: Hu Tao To: qemu-devel@nongnu.org Date: Fri, 26 Apr 2013 11:24:42 +0800 Message-Id: X-Mailer: git-send-email 1.8.1.4 In-Reply-To: References: X-MIMETrack: Itemize by SMTP Server on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/04/26 11:23:42, Serialize by Router on mailserver/fnst(Release 8.5.3|September 15, 2011) at 2013/04/26 11:23:43, Serialize complete at 2013/04/26 11:23:43 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 222.73.24.84 Cc: Paolo Bonzini , Markus Armbruster Subject: [Qemu-devel] [PATCH v21 3/8] introduce a new qom device to deal with panicked event X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org pvpanic device is used to send guest panic event from guest to qemu. When guest panic happens, pvpanic device driver will write a event number to IO port 0x505(which is the IO port occupied by pvpanic device, by default). On receiving the event, pvpanic device will pause guest cpu(s), and send a qmp event QEVENT_GUEST_PANICKED. Signed-off-by: Wen Congyang Signed-off-by: Hu Tao Reviewed-by: Markus Armbruster --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/misc/Makefile.objs | 2 + hw/misc/pvpanic.c | 123 +++++++++++++++++++++++++++++++++++++ 4 files changed, 127 insertions(+) create mode 100644 hw/misc/pvpanic.c diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak index 368a776..c38b367 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -44,3 +44,4 @@ CONFIG_LPC_ICH9=y CONFIG_PCI_Q35=y CONFIG_APIC=y CONFIG_IOAPIC=y +CONFIG_PVPANIC=y diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak index 2711b83..e00b6d8 100644 --- a/default-configs/x86_64-softmmu.mak +++ b/default-configs/x86_64-softmmu.mak @@ -44,3 +44,4 @@ CONFIG_LPC_ICH9=y CONFIG_PCI_Q35=y CONFIG_APIC=y CONFIG_IOAPIC=y +CONFIG_PVPANIC=y diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 11b18a4..2578e29 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -39,3 +39,5 @@ obj-$(CONFIG_OMAP) += omap_tap.o obj-$(CONFIG_PXA2XX) += pxa2xx_pcmcia.o obj-$(CONFIG_SLAVIO) += slavio_misc.o obj-$(CONFIG_ZYNQ) += zynq_slcr.o + +obj-$(CONFIG_PVPANIC) += pvpanic.o diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c new file mode 100644 index 0000000..01cfe0b --- /dev/null +++ b/hw/misc/pvpanic.c @@ -0,0 +1,123 @@ +/* + * QEMU simulated pvpanic device. + * + * Copyright Fujitsu, Corp. 2013 + * + * Authors: + * Wen Congyang + * Hu Tao + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include "qapi/qmp/qobject.h" +#include "qapi/qmp/qjson.h" +#include "monitor/monitor.h" +#include "sysemu/sysemu.h" +#include "qemu/log.h" + +/* The bit of supported pv event */ +#define PVPANIC_F_PANICKED 0 + +/* The pv event value */ +#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED) + +#define TYPE_ISA_PVPANIC_DEVICE "pvpanic" +#define ISA_PVPANIC_DEVICE(obj) \ + OBJECT_CHECK(PVPanicState, (obj), TYPE_ISA_PVPANIC_DEVICE) + +static void panicked_mon_event(const char *action) +{ + QObject *data; + + data = qobject_from_jsonf("{ 'action': %s }", action); + monitor_protocol_event(QEVENT_GUEST_PANICKED, data); + qobject_decref(data); +} + +static void handle_event(int event) +{ + static bool logged; + + if (event & ~PVPANIC_PANICKED && !logged) { + qemu_log_mask(LOG_GUEST_ERROR, "pvpanic: unknown event %#x.\n", event); + logged = true; + } + + if (event & PVPANIC_PANICKED) { + panicked_mon_event("pause"); + vm_stop(RUN_STATE_GUEST_PANICKED); + return; + } +} + +#include "hw/isa/isa.h" + +typedef struct PVPanicState { + ISADevice parent_obj; + + MemoryRegion io; + uint16_t ioport; +} PVPanicState; + +/* return supported events on read */ +static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size) +{ + return PVPANIC_PANICKED; +} + +static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + handle_event(val); +} + +static const MemoryRegionOps pvpanic_ops = { + .read = pvpanic_ioport_read, + .write = pvpanic_ioport_write, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +static int pvpanic_isa_initfn(ISADevice *dev) +{ + PVPanicState *s = ISA_PVPANIC_DEVICE(dev); + + memory_region_init_io(&s->io, &pvpanic_ops, s, "pvpanic", 1); + isa_register_ioport(dev, &s->io, s->ioport); + + return 0; +} + +static Property pvpanic_isa_properties[] = { + DEFINE_PROP_UINT16("ioport", PVPanicState, ioport, 0x505), + DEFINE_PROP_END_OF_LIST(), +}; + +static void pvpanic_isa_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + ISADeviceClass *ic = ISA_DEVICE_CLASS(klass); + + ic->init = pvpanic_isa_initfn; + dc->no_user = 1; + dc->props = pvpanic_isa_properties; +} + +static TypeInfo pvpanic_isa_info = { + .name = TYPE_ISA_PVPANIC_DEVICE, + .parent = TYPE_ISA_DEVICE, + .instance_size = sizeof(PVPanicState), + .class_init = pvpanic_isa_class_init, +}; + +static void pvpanic_register_types(void) +{ + type_register_static(&pvpanic_isa_info); +} + +type_init(pvpanic_register_types)