diff mbox series

[3/7] target/ppc: Move ppcemb_tlb_search() to mmu_common.c

Message ID b64fd712a773558dea9b84945c57785546c0ae2e.1685448535.git.balaton@eik.bme.hu
State New
Headers show
Series Embedded PPC misc clean up and optimisation | expand

Commit Message

BALATON Zoltan May 30, 2023, 1:28 p.m. UTC
This function is the only reason why ppcemb_tlb_check() is not static
to mmu_common.c but it also better fits in mmu_common.c so move it
there.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 target/ppc/cpu.h        |  4 +---
 target/ppc/mmu_common.c | 22 +++++++++++++++++++++-
 target/ppc/mmu_helper.c | 21 ---------------------
 3 files changed, 22 insertions(+), 25 deletions(-)

Comments

Cédric Le Goater June 1, 2023, 8:39 a.m. UTC | #1
On 5/30/23 15:28, BALATON Zoltan wrote:
> This function is the only reason why ppcemb_tlb_check() is not static
> to mmu_common.c but it also better fits in mmu_common.c so move it
> there.
> 
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.

> ---
>   target/ppc/cpu.h        |  4 +---
>   target/ppc/mmu_common.c | 22 +++++++++++++++++++++-
>   target/ppc/mmu_helper.c | 21 ---------------------
>   3 files changed, 22 insertions(+), 25 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 5cd1b442b4..77eb5edea2 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1428,9 +1428,7 @@ void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp);
>   int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
>                               hwaddr *raddrp, target_ulong address,
>                               uint32_t pid);
> -int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
> -                            hwaddr *raddrp,
> -                            target_ulong address, uint32_t pid, int i);
> +int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid);
>   hwaddr booke206_tlb_to_page_size(CPUPPCState *env,
>                                           ppcmas_tlb_t *tlb);
>   #endif
> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
> index 21a353c51a..845eee4c6f 100644
> --- a/target/ppc/mmu_common.c
> +++ b/target/ppc/mmu_common.c
> @@ -489,7 +489,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
>   }
>   
>   /* Generic TLB check function for embedded PowerPC implementations */
> -int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
> +static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
>                               hwaddr *raddrp,
>                               target_ulong address, uint32_t pid, int i)
>   {
> @@ -516,6 +516,26 @@ int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
>       return 0;
>   }
>   
> +/* Generic TLB search function for PowerPC embedded implementations */
> +int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid)
> +{
> +    ppcemb_tlb_t *tlb;
> +    hwaddr raddr;
> +    int i, ret;
> +
> +    /* Default return value is no match */
> +    ret = -1;
> +    for (i = 0; i < env->nb_tlb; i++) {
> +        tlb = &env->tlb.tlbe[i];
> +        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
> +            ret = i;
> +            break;
> +        }
> +    }
> +
> +    return ret;
> +}
> +
>   static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
>                                          target_ulong address,
>                                          MMUAccessType access_type)
> diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
> index e7275eaec1..d3ea7588f9 100644
> --- a/target/ppc/mmu_helper.c
> +++ b/target/ppc/mmu_helper.c
> @@ -112,27 +112,6 @@ static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way,
>       env->last_way = way;
>   }
>   
> -/* Generic TLB search function for PowerPC embedded implementations */
> -static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address,
> -                             uint32_t pid)
> -{
> -    ppcemb_tlb_t *tlb;
> -    hwaddr raddr;
> -    int i, ret;
> -
> -    /* Default return value is no match */
> -    ret = -1;
> -    for (i = 0; i < env->nb_tlb; i++) {
> -        tlb = &env->tlb.tlbe[i];
> -        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
> -            ret = i;
> -            break;
> -        }
> -    }
> -
> -    return ret;
> -}
> -
>   /* Helpers specific to PowerPC 40x implementations */
>   static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env)
>   {
diff mbox series

Patch

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5cd1b442b4..77eb5edea2 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1428,9 +1428,7 @@  void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp);
 int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
                             hwaddr *raddrp, target_ulong address,
                             uint32_t pid);
-int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
-                            hwaddr *raddrp,
-                            target_ulong address, uint32_t pid, int i);
+int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid);
 hwaddr booke206_tlb_to_page_size(CPUPPCState *env,
                                         ppcmas_tlb_t *tlb);
 #endif
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 21a353c51a..845eee4c6f 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -489,7 +489,7 @@  static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
 }
 
 /* Generic TLB check function for embedded PowerPC implementations */
-int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
+static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
                             hwaddr *raddrp,
                             target_ulong address, uint32_t pid, int i)
 {
@@ -516,6 +516,26 @@  int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
     return 0;
 }
 
+/* Generic TLB search function for PowerPC embedded implementations */
+int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid)
+{
+    ppcemb_tlb_t *tlb;
+    hwaddr raddr;
+    int i, ret;
+
+    /* Default return value is no match */
+    ret = -1;
+    for (i = 0; i < env->nb_tlb; i++) {
+        tlb = &env->tlb.tlbe[i];
+        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
+            ret = i;
+            break;
+        }
+    }
+
+    return ret;
+}
+
 static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
                                        target_ulong address,
                                        MMUAccessType access_type)
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index e7275eaec1..d3ea7588f9 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -112,27 +112,6 @@  static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way,
     env->last_way = way;
 }
 
-/* Generic TLB search function for PowerPC embedded implementations */
-static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address,
-                             uint32_t pid)
-{
-    ppcemb_tlb_t *tlb;
-    hwaddr raddr;
-    int i, ret;
-
-    /* Default return value is no match */
-    ret = -1;
-    for (i = 0; i < env->nb_tlb; i++) {
-        tlb = &env->tlb.tlbe[i];
-        if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, i) == 0) {
-            ret = i;
-            break;
-        }
-    }
-
-    return ret;
-}
-
 /* Helpers specific to PowerPC 40x implementations */
 static inline void ppc4xx_tlb_invalidate_all(CPUPPCState *env)
 {