From patchwork Tue Jun 16 13:47:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1310430 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49mVBX0df3z9sRN for ; Tue, 16 Jun 2020 23:57:24 +1000 (AEST) Received: from localhost ([::1]:40796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jlC5Z-0001Ma-OZ for incoming@patchwork.ozlabs.org; Tue, 16 Jun 2020 09:57:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52010) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jlC1o-00028N-UB; Tue, 16 Jun 2020 09:53:28 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:36221) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jlC1m-0002QH-5d; Tue, 16 Jun 2020 09:53:28 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 7B10E748DCF; Tue, 16 Jun 2020 15:53:18 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id D8AFF748DDA; Tue, 16 Jun 2020 15:53:17 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v5 11/11] mac_oldworld: Add SPD data to cover RAM Date: Tue, 16 Jun 2020 15:47:06 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" OpenBIOS gets RAM size via fw_cfg but rhe original board firmware detects RAM using SPD data so generate and add SDP eeproms to cover as much RAM as possible to describe with SPD (this may be less than the actual ram_size due to SDRAM size constraints). Signed-off-by: BALATON Zoltan --- hw/ppc/mac_oldworld.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 14a191ff88..fcc0d6d933 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -34,6 +34,7 @@ #include "hw/input/adb.h" #include "sysemu/sysemu.h" #include "net/net.h" +#include "hw/i2c/smbus_eeprom.h" #include "hw/isa/isa.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -133,6 +134,8 @@ static void ppc_heathrow_init(MachineState *machine) DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; void *fw_cfg; uint64_t tbfreq; + uint8_t *spd_data[3] = {}; + I2CBus *i2c_bus; /* init CPUs */ for (i = 0; i < smp_cpus; i++) { @@ -150,8 +153,16 @@ static void ppc_heathrow_init(MachineState *machine) "maximum 2047 MB", ram_size / MiB); exit(1); } - memory_region_add_subregion(get_system_memory(), 0, machine->ram); + for (i = 0; i < 3; i++) { + int size_left = ram_size - i * 512 * MiB; + if (size_left > 0) { + uint32_t s = size_left / MiB; + s = (s > 512 ? 512 : s); + s = 1U << (31 - clz32(s)); + spd_data[i] = spd_data_generate(SDR, s * MiB); + } + } /* allocate and load firmware ROM */ memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE, @@ -337,6 +348,12 @@ static void ppc_heathrow_init(MachineState *machine) macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); + i2c_bus = I2C_BUS(qdev_get_child_bus(dev, "i2c")); + for (i = 0; i < 3; i++) { + if (spd_data[i]) { + smbus_eeprom_init_one(i2c_bus, 0x50 + i, spd_data[i]); + } + } adb_bus = qdev_get_child_bus(dev, "adb.0"); dev = qdev_new(TYPE_ADB_KEYBOARD); qdev_realize_and_unref(dev, adb_bus, &error_fatal);