From patchwork Tue Dec 9 01:55:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Maciej W. Rozycki" X-Patchwork-Id: 418932 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 848BA1400D5 for ; Tue, 9 Dec 2014 12:58:20 +1100 (AEDT) Received: from localhost ([::1]:37316 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyA4A-00044x-NX for incoming@patchwork.ozlabs.org; Mon, 08 Dec 2014 20:58:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47962) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyA1g-0000FR-2p for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:55:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XyA1W-0004uC-S4 for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:55:44 -0500 Received: from relay1.mentorg.com ([192.94.38.131]:48408) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XyA1W-0004tr-3r for qemu-devel@nongnu.org; Mon, 08 Dec 2014 20:55:34 -0500 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-03.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1XyA1U-0000Ve-0s from Maciej_Rozycki@mentor.com ; Mon, 08 Dec 2014 17:55:33 -0800 Received: from localhost (137.202.0.76) by SVR-IES-FEM-03.mgc.mentorg.com (137.202.0.108) with Microsoft SMTP Server (TLS) id 14.3.181.6; Tue, 9 Dec 2014 01:55:28 +0000 Date: Tue, 9 Dec 2014 01:55:24 +0000 From: "Maciej W. Rozycki" To: In-Reply-To: Message-ID: References: User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 192.94.38.131 Cc: Blue Swirl , Leon Alrae , Thomas Schwinge , Aurelien Jarno Subject: [Qemu-devel] [PATCH 4/7] softfloat: Add SoftFloat status parameter to `*_nan' functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Mechanically update `*_nan' functions with a SoftFloat status parameter where qNaNs and sNaNs need to be told apart. Update all callers accordingly. Signed-off-by: Thomas Schwinge Signed-off-by: Maciej W. Rozycki --- BTW, this is another patch checkpatch.pl hangs on. Please apply. qemu-softfloat-nan-status.diff Index: qemu-git-trunk/fpu/softfloat-specialize.h =================================================================== --- qemu-git-trunk.orig/fpu/softfloat-specialize.h 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/fpu/softfloat-specialize.h 2014-12-08 22:37:36.758946934 +0000 @@ -51,7 +51,7 @@ these four paragraphs for those parts of /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ -inline float16 float16_default_nan(void) +inline float16 float16_default_nan(STATUS_PARAM_ONLY) { #if defined(TARGET_ARM) return const_float16(0x7E00); @@ -65,7 +65,7 @@ inline float16 float16_default_nan(void) /*---------------------------------------------------------------------------- | The pattern for a default generated single-precision NaN. *----------------------------------------------------------------------------*/ -inline float32 float32_default_nan(void) +inline float32 float32_default_nan(STATUS_PARAM_ONLY) { #if defined(TARGET_SPARC) return const_float32(0x7FFFFFFF); @@ -82,7 +82,7 @@ inline float32 float32_default_nan(void) /*---------------------------------------------------------------------------- | The pattern for a default generated double-precision NaN. *----------------------------------------------------------------------------*/ -inline float64 float64_default_nan(void) +inline float64 float64_default_nan(STATUS_PARAM_ONLY) { #if defined(TARGET_SPARC) return const_float64(LIT64(0x7FFFFFFFFFFFFFFF)); @@ -98,7 +98,7 @@ inline float64 float64_default_nan(void) /*---------------------------------------------------------------------------- | The pattern for a default generated extended double-precision NaN. *----------------------------------------------------------------------------*/ -inline floatx80 floatx80_default_nan(void) +inline floatx80 floatx80_default_nan(STATUS_PARAM_ONLY) { #if SNAN_BIT_IS_ONE return make_floatx80(0x7FFF, LIT64(0xBFFFFFFFFFFFFFFF)); @@ -111,7 +111,7 @@ inline floatx80 floatx80_default_nan(voi | The pattern for a default generated quadruple-precision NaN. The `high' and | `low' values hold the most- and least-significant bits, respectively. *----------------------------------------------------------------------------*/ -inline float128 float128_default_nan(void) +inline float128 float128_default_nan(STATUS_PARAM_ONLY) { #if SNAN_BIT_IS_ONE return make_float128(LIT64(0x7FFF7FFFFFFFFFFF), LIT64(0xFFFFFFFFFFFFFFFF)); @@ -141,12 +141,12 @@ typedef struct { } commonNaNT; #ifdef NO_SIGNALING_NANS -int float16_is_quiet_nan(float16 a_) +int float16_is_quiet_nan(float16 a_ STATUS_PARAM) { return float16_is_any_nan(a_); } -int float16_is_signaling_nan(float16 a_) +int float16_is_signaling_nan(float16 a_ STATUS_PARAM) { return 0; } @@ -156,7 +156,7 @@ int float16_is_signaling_nan(float16 a_) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float16_is_quiet_nan(float16 a_) +int float16_is_quiet_nan(float16 a_ STATUS_PARAM) { uint16_t a = float16_val(a_); #if SNAN_BIT_IS_ONE @@ -171,7 +171,7 @@ int float16_is_quiet_nan(float16 a_) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float16_is_signaling_nan(float16 a_) +int float16_is_signaling_nan(float16 a_ STATUS_PARAM) { uint16_t a = float16_val(a_); #if SNAN_BIT_IS_ONE @@ -186,12 +186,12 @@ int float16_is_signaling_nan(float16 a_) | Returns a quiet NaN if the half-precision floating point value `a' is a | signaling NaN; otherwise returns `a'. *----------------------------------------------------------------------------*/ -float16 float16_maybe_silence_nan(float16 a_) +float16 float16_maybe_silence_nan(float16 a_ STATUS_PARAM) { - if (float16_is_signaling_nan(a_)) { + if (float16_is_signaling_nan(a_ STATUS_VAR)) { #if SNAN_BIT_IS_ONE # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) - return float16_default_nan(); + return float16_default_nan(status); # else # error Rules for silencing a signaling NaN are target-specific # endif @@ -210,14 +210,16 @@ float16 float16_maybe_silence_nan(float1 | exception is raised. *----------------------------------------------------------------------------*/ -static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM ) +static commonNaNT float16ToCommonNaN(float16 a STATUS_PARAM) { commonNaNT z; - if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); + if (float16_is_signaling_nan(a STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); + } z.sign = float16_val(a) >> 15; z.low = 0; - z.high = ((uint64_t) float16_val(a))<<54; + z.high = ((uint64_t) float16_val(a)) << 54; return z; } @@ -231,24 +233,24 @@ static float16 commonNaNToFloat16(common uint16_t mantissa = a.high>>54; if (STATUS(default_nan_mode)) { - return float16_default_nan(); + return float16_default_nan(status); } if (mantissa) { return make_float16(((((uint16_t) a.sign) << 15) | (0x1F << 10) | mantissa)); } else { - return float16_default_nan(); + return float16_default_nan(status); } } #ifdef NO_SIGNALING_NANS -int float32_is_quiet_nan(float32 a_) +int float32_is_quiet_nan(float32 a_ STATUS_PARAM) { return float32_is_any_nan(a_); } -int float32_is_signaling_nan(float32 a_) +int float32_is_signaling_nan(float32 a_ STATUS_PARAM) { return 0; } @@ -258,7 +260,7 @@ int float32_is_signaling_nan(float32 a_) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float32_is_quiet_nan( float32 a_ ) +int float32_is_quiet_nan(float32 a_ STATUS_PARAM) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE @@ -273,7 +275,7 @@ int float32_is_quiet_nan( float32 a_ ) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float32_is_signaling_nan( float32 a_ ) +int float32_is_signaling_nan(float32 a_ STATUS_PARAM) { uint32_t a = float32_val(a_); #if SNAN_BIT_IS_ONE @@ -289,12 +291,12 @@ int float32_is_signaling_nan( float32 a_ | signaling NaN; otherwise returns `a'. *----------------------------------------------------------------------------*/ -float32 float32_maybe_silence_nan( float32 a_ ) +float32 float32_maybe_silence_nan(float32 a_ STATUS_PARAM) { - if (float32_is_signaling_nan(a_)) { + if (float32_is_signaling_nan(a_ STATUS_VAR)) { #if SNAN_BIT_IS_ONE # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) - return float32_default_nan(); + return float32_default_nan(status); # else # error Rules for silencing a signaling NaN are target-specific # endif @@ -313,14 +315,16 @@ float32 float32_maybe_silence_nan( float | exception is raised. *----------------------------------------------------------------------------*/ -static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM ) +static commonNaNT float32ToCommonNaN(float32 a STATUS_PARAM) { commonNaNT z; - if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR ); - z.sign = float32_val(a)>>31; + if (float32_is_signaling_nan(a STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); + } + z.sign = float32_val(a) >> 31; z.low = 0; - z.high = ( (uint64_t) float32_val(a) )<<41; + z.high = ((uint64_t) float32_val(a)) << 41; return z; } @@ -334,14 +338,14 @@ static float32 commonNaNToFloat32( commo uint32_t mantissa = a.high>>41; if ( STATUS(default_nan_mode) ) { - return float32_default_nan(); + return float32_default_nan(status); } if ( mantissa ) return make_float32( ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) ); else - return float32_default_nan(); + return float32_default_nan(status); } /*---------------------------------------------------------------------------- @@ -571,17 +575,17 @@ static float32 propagateFloat32NaN( floa flag aIsLargerSignificand; uint32_t av, bv; - aIsQuietNaN = float32_is_quiet_nan( a ); - aIsSignalingNaN = float32_is_signaling_nan( a ); - bIsQuietNaN = float32_is_quiet_nan( b ); - bIsSignalingNaN = float32_is_signaling_nan( b ); + aIsQuietNaN = float32_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = float32_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = float32_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = float32_is_signaling_nan(b STATUS_VAR); av = float32_val(a); bv = float32_val(b); if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); if ( STATUS(default_nan_mode) ) - return float32_default_nan(); + return float32_default_nan(status); if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) { aIsLargerSignificand = 0; @@ -593,9 +597,9 @@ static float32 propagateFloat32NaN( floa if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float32_maybe_silence_nan(b); + return float32_maybe_silence_nan(b STATUS_VAR); } else { - return float32_maybe_silence_nan(a); + return float32_maybe_silence_nan(a STATUS_VAR); } } @@ -615,12 +619,12 @@ static float32 propagateFloat32MulAddNaN cIsQuietNaN, cIsSignalingNaN; int which; - aIsQuietNaN = float32_is_quiet_nan(a); - aIsSignalingNaN = float32_is_signaling_nan(a); - bIsQuietNaN = float32_is_quiet_nan(b); - bIsSignalingNaN = float32_is_signaling_nan(b); - cIsQuietNaN = float32_is_quiet_nan(c); - cIsSignalingNaN = float32_is_signaling_nan(c); + aIsQuietNaN = float32_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = float32_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = float32_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = float32_is_signaling_nan(b STATUS_VAR); + cIsQuietNaN = float32_is_quiet_nan(c STATUS_VAR); + cIsSignalingNaN = float32_is_signaling_nan(c STATUS_VAR); if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) { float_raise(float_flag_invalid STATUS_VAR); @@ -634,29 +638,29 @@ static float32 propagateFloat32MulAddNaN /* Note that this check is after pickNaNMulAdd so that function * has an opportunity to set the Invalid flag. */ - return float32_default_nan(); + return float32_default_nan(status); } switch (which) { case 0: - return float32_maybe_silence_nan(a); + return float32_maybe_silence_nan(a STATUS_VAR); case 1: - return float32_maybe_silence_nan(b); + return float32_maybe_silence_nan(b STATUS_VAR); case 2: - return float32_maybe_silence_nan(c); + return float32_maybe_silence_nan(c STATUS_VAR); case 3: default: - return float32_default_nan(); + return float32_default_nan(status); } } #ifdef NO_SIGNALING_NANS -int float64_is_quiet_nan(float64 a_) +int float64_is_quiet_nan(float64 a_ STATUS_PARAM) { return float64_is_any_nan(a_); } -int float64_is_signaling_nan(float64 a_) +int float64_is_signaling_nan(float64 a_ STATUS_PARAM) { return 0; } @@ -666,7 +670,7 @@ int float64_is_signaling_nan(float64 a_) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float64_is_quiet_nan( float64 a_ ) +int float64_is_quiet_nan(float64 a_ STATUS_PARAM) { uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE @@ -683,7 +687,7 @@ int float64_is_quiet_nan( float64 a_ ) | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float64_is_signaling_nan( float64 a_ ) +int float64_is_signaling_nan(float64 a_ STATUS_PARAM) { uint64_t a = float64_val(a_); #if SNAN_BIT_IS_ONE @@ -701,12 +705,12 @@ int float64_is_signaling_nan( float64 a_ | signaling NaN; otherwise returns `a'. *----------------------------------------------------------------------------*/ -float64 float64_maybe_silence_nan( float64 a_ ) +float64 float64_maybe_silence_nan(float64 a_ STATUS_PARAM) { - if (float64_is_signaling_nan(a_)) { + if (float64_is_signaling_nan(a_ STATUS_VAR)) { #if SNAN_BIT_IS_ONE # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) - return float64_default_nan(); + return float64_default_nan(status); # else # error Rules for silencing a signaling NaN are target-specific # endif @@ -725,14 +729,16 @@ float64 float64_maybe_silence_nan( float | exception is raised. *----------------------------------------------------------------------------*/ -static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM) +static commonNaNT float64ToCommonNaN(float64 a STATUS_PARAM) { commonNaNT z; - if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); - z.sign = float64_val(a)>>63; + if (float64_is_signaling_nan(a STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); + } + z.sign = float64_val(a) >> 63; z.low = 0; - z.high = float64_val(a)<<12; + z.high = float64_val(a) << 12; return z; } @@ -746,7 +752,7 @@ static float64 commonNaNToFloat64( commo uint64_t mantissa = a.high>>12; if ( STATUS(default_nan_mode) ) { - return float64_default_nan(); + return float64_default_nan(status); } if ( mantissa ) @@ -755,7 +761,7 @@ static float64 commonNaNToFloat64( commo | LIT64( 0x7FF0000000000000 ) | ( a.high>>12 )); else - return float64_default_nan(); + return float64_default_nan(status); } /*---------------------------------------------------------------------------- @@ -770,17 +776,17 @@ static float64 propagateFloat64NaN( floa flag aIsLargerSignificand; uint64_t av, bv; - aIsQuietNaN = float64_is_quiet_nan( a ); - aIsSignalingNaN = float64_is_signaling_nan( a ); - bIsQuietNaN = float64_is_quiet_nan( b ); - bIsSignalingNaN = float64_is_signaling_nan( b ); + aIsQuietNaN = float64_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = float64_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = float64_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = float64_is_signaling_nan(b STATUS_VAR); av = float64_val(a); bv = float64_val(b); if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); if ( STATUS(default_nan_mode) ) - return float64_default_nan(); + return float64_default_nan(status); if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) { aIsLargerSignificand = 0; @@ -792,9 +798,9 @@ static float64 propagateFloat64NaN( floa if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float64_maybe_silence_nan(b); + return float64_maybe_silence_nan(b STATUS_VAR); } else { - return float64_maybe_silence_nan(a); + return float64_maybe_silence_nan(a STATUS_VAR); } } @@ -814,12 +820,12 @@ static float64 propagateFloat64MulAddNaN cIsQuietNaN, cIsSignalingNaN; int which; - aIsQuietNaN = float64_is_quiet_nan(a); - aIsSignalingNaN = float64_is_signaling_nan(a); - bIsQuietNaN = float64_is_quiet_nan(b); - bIsSignalingNaN = float64_is_signaling_nan(b); - cIsQuietNaN = float64_is_quiet_nan(c); - cIsSignalingNaN = float64_is_signaling_nan(c); + aIsQuietNaN = float64_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = float64_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = float64_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = float64_is_signaling_nan(b STATUS_VAR); + cIsQuietNaN = float64_is_quiet_nan(c STATUS_VAR); + cIsSignalingNaN = float64_is_signaling_nan(c STATUS_VAR); if (aIsSignalingNaN | bIsSignalingNaN | cIsSignalingNaN) { float_raise(float_flag_invalid STATUS_VAR); @@ -833,29 +839,29 @@ static float64 propagateFloat64MulAddNaN /* Note that this check is after pickNaNMulAdd so that function * has an opportunity to set the Invalid flag. */ - return float64_default_nan(); + return float64_default_nan(status); } switch (which) { case 0: - return float64_maybe_silence_nan(a); + return float64_maybe_silence_nan(a STATUS_VAR); case 1: - return float64_maybe_silence_nan(b); + return float64_maybe_silence_nan(b STATUS_VAR); case 2: - return float64_maybe_silence_nan(c); + return float64_maybe_silence_nan(c STATUS_VAR); case 3: default: - return float64_default_nan(); + return float64_default_nan(status); } } #ifdef NO_SIGNALING_NANS -int floatx80_is_quiet_nan(floatx80 a_) +int floatx80_is_quiet_nan(floatx80 a_ STATUS_PARAM) { return floatx80_is_any_nan(a_); } -int floatx80_is_signaling_nan(floatx80 a_) +int floatx80_is_signaling_nan(floatx80 a_ STATUS_PARAM) { return 0; } @@ -866,7 +872,7 @@ int floatx80_is_signaling_nan(floatx80 a | function for other types as floatx80 has an explicit bit. *----------------------------------------------------------------------------*/ -int floatx80_is_quiet_nan( floatx80 a ) +int floatx80_is_quiet_nan(floatx80 a STATUS_PARAM) { #if SNAN_BIT_IS_ONE uint64_t aLow; @@ -888,7 +894,7 @@ int floatx80_is_quiet_nan( floatx80 a ) | function for other types as floatx80 has an explicit bit. *----------------------------------------------------------------------------*/ -int floatx80_is_signaling_nan( floatx80 a ) +int floatx80_is_signaling_nan(floatx80 a STATUS_PARAM) { #if SNAN_BIT_IS_ONE return ( ( a.high & 0x7FFF ) == 0x7FFF ) @@ -910,12 +916,12 @@ int floatx80_is_signaling_nan( floatx80 | `a' is a signaling NaN; otherwise returns `a'. *----------------------------------------------------------------------------*/ -floatx80 floatx80_maybe_silence_nan( floatx80 a ) +floatx80 floatx80_maybe_silence_nan(floatx80 a STATUS_PARAM) { - if (floatx80_is_signaling_nan(a)) { + if (floatx80_is_signaling_nan(a STATUS_VAR)) { #if SNAN_BIT_IS_ONE # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) - a = floatx80_default_nan(); + a = floatx80_default_nan(status); # else # error Rules for silencing a signaling NaN are target-specific # endif @@ -933,14 +939,16 @@ floatx80 floatx80_maybe_silence_nan( flo | invalid exception is raised. *----------------------------------------------------------------------------*/ -static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM) +static commonNaNT floatx80ToCommonNaN(floatx80 a STATUS_PARAM) { commonNaNT z; - if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); + if (floatx80_is_signaling_nan(a STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); + } /* Replace a Pseudo NaN with a default NaN. */ if (!(a.low >> 63)) { - a = floatx80_default_nan(); + a = floatx80_default_nan(status); } z.sign = a.high >> 15; z.low = 0; @@ -958,14 +966,14 @@ static floatx80 commonNaNToFloatx80( com floatx80 z; if ( STATUS(default_nan_mode) ) { - return floatx80_default_nan(); + return floatx80_default_nan(status); } if (a.high >> 1) { z.low = LIT64( 0x8000000000000000 ) | a.high >> 1; z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF; } else { - z = floatx80_default_nan(); + z = floatx80_default_nan(status); } return z; @@ -982,15 +990,15 @@ static floatx80 propagateFloatx80NaN( fl flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; - aIsQuietNaN = floatx80_is_quiet_nan( a ); - aIsSignalingNaN = floatx80_is_signaling_nan( a ); - bIsQuietNaN = floatx80_is_quiet_nan( b ); - bIsSignalingNaN = floatx80_is_signaling_nan( b ); + aIsQuietNaN = floatx80_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = floatx80_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = floatx80_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = floatx80_is_signaling_nan(b STATUS_VAR); if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); if ( STATUS(default_nan_mode) ) { - return floatx80_default_nan(); + return floatx80_default_nan(status); } if (a.low < b.low) { @@ -1003,19 +1011,19 @@ static floatx80 propagateFloatx80NaN( fl if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return floatx80_maybe_silence_nan(b); + return floatx80_maybe_silence_nan(b STATUS_VAR); } else { - return floatx80_maybe_silence_nan(a); + return floatx80_maybe_silence_nan(a STATUS_VAR); } } #ifdef NO_SIGNALING_NANS -int float128_is_quiet_nan(float128 a_) +int float128_is_quiet_nan(float128 a_ STATUS_PARAM) { return float128_is_any_nan(a_); } -int float128_is_signaling_nan(float128 a_) +int float128_is_signaling_nan(float128 a_ STATUS_PARAM) { return 0; } @@ -1025,7 +1033,7 @@ int float128_is_signaling_nan(float128 a | NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float128_is_quiet_nan( float128 a ) +int float128_is_quiet_nan(float128 a STATUS_PARAM) { #if SNAN_BIT_IS_ONE return @@ -1043,7 +1051,7 @@ int float128_is_quiet_nan( float128 a ) | signaling NaN; otherwise returns 0. *----------------------------------------------------------------------------*/ -int float128_is_signaling_nan( float128 a ) +int float128_is_signaling_nan(float128 a STATUS_PARAM) { #if SNAN_BIT_IS_ONE return @@ -1062,12 +1070,12 @@ int float128_is_signaling_nan( float128 | a signaling NaN; otherwise returns `a'. *----------------------------------------------------------------------------*/ -float128 float128_maybe_silence_nan( float128 a ) +float128 float128_maybe_silence_nan(float128 a STATUS_PARAM) { - if (float128_is_signaling_nan(a)) { + if (float128_is_signaling_nan(a STATUS_VAR)) { #if SNAN_BIT_IS_ONE # if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32) - a = float128_default_nan(); + a = float128_default_nan(status); # else # error Rules for silencing a signaling NaN are target-specific # endif @@ -1085,13 +1093,15 @@ float128 float128_maybe_silence_nan( flo | exception is raised. *----------------------------------------------------------------------------*/ -static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM) +static commonNaNT float128ToCommonNaN(float128 a STATUS_PARAM) { commonNaNT z; - if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR); - z.sign = a.high>>63; - shortShift128Left( a.high, a.low, 16, &z.high, &z.low ); + if (float128_is_signaling_nan(a STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); + } + z.sign = a.high >> 63; + shortShift128Left(a.high, a.low, 16, &z.high, &z.low); return z; } @@ -1105,7 +1115,7 @@ static float128 commonNaNToFloat128( com float128 z; if ( STATUS(default_nan_mode) ) { - return float128_default_nan(); + return float128_default_nan(status); } shift128Right( a.high, a.low, 16, &z.high, &z.low ); @@ -1124,15 +1134,15 @@ static float128 propagateFloat128NaN( fl flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; flag aIsLargerSignificand; - aIsQuietNaN = float128_is_quiet_nan( a ); - aIsSignalingNaN = float128_is_signaling_nan( a ); - bIsQuietNaN = float128_is_quiet_nan( b ); - bIsSignalingNaN = float128_is_signaling_nan( b ); + aIsQuietNaN = float128_is_quiet_nan(a STATUS_VAR); + aIsSignalingNaN = float128_is_signaling_nan(a STATUS_VAR); + bIsQuietNaN = float128_is_quiet_nan(b STATUS_VAR); + bIsSignalingNaN = float128_is_signaling_nan(b STATUS_VAR); if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR); if ( STATUS(default_nan_mode) ) { - return float128_default_nan(); + return float128_default_nan(status); } if (lt128(a.high<<1, a.low, b.high<<1, b.low)) { @@ -1145,9 +1155,9 @@ static float128 propagateFloat128NaN( fl if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, aIsLargerSignificand)) { - return float128_maybe_silence_nan(b); + return float128_maybe_silence_nan(b STATUS_VAR); } else { - return float128_maybe_silence_nan(a); + return float128_maybe_silence_nan(a STATUS_VAR); } } Index: qemu-git-trunk/fpu/softfloat.c =================================================================== --- qemu-git-trunk.orig/fpu/softfloat.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/fpu/softfloat.c 2014-12-08 22:37:36.758946934 +0000 @@ -1714,7 +1714,8 @@ float64 float32_to_float64( float32 a ST if (aSig) { return float64_maybe_silence_nan( commonNaNToFloat64(float32ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat64( aSign, 0x7FF, 0 ); } @@ -1748,7 +1749,8 @@ floatx80 float32_to_floatx80( float32 a if (aSig) { return floatx80_maybe_silence_nan( commonNaNToFloatx80(float32ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } @@ -1782,7 +1784,8 @@ float128 float32_to_float128( float32 a if (aSig) { return float128_maybe_silence_nan( commonNaNToFloat128(float32ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat128( aSign, 0x7FFF, 0, 0 ); } @@ -1979,7 +1982,7 @@ static float32 subFloat32Sigs( float32 a if ( aExp == 0xFF ) { if ( aSig | bSig ) return propagateFloat32NaN( a, b STATUS_VAR ); float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if ( aExp == 0 ) { aExp = 1; @@ -2104,7 +2107,7 @@ float32 float32_mul( float32 a, float32 } if ( ( bExp | bSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } return packFloat32( zSign, 0xFF, 0 ); } @@ -2112,7 +2115,7 @@ float32 float32_mul( float32 a, float32 if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR ); if ( ( aExp | aSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } return packFloat32( zSign, 0xFF, 0 ); } @@ -2163,7 +2166,7 @@ float32 float32_div( float32 a, float32 if ( bExp == 0xFF ) { if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR ); float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } return packFloat32( zSign, 0xFF, 0 ); } @@ -2175,7 +2178,7 @@ float32 float32_div( float32 a, float32 if ( bSig == 0 ) { if ( ( aExp | aSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } float_raise( float_flag_divbyzero STATUS_VAR); return packFloat32( zSign, 0xFF, 0 ); @@ -2229,7 +2232,7 @@ float32 float32_rem( float32 a, float32 return propagateFloat32NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if ( bExp == 0xFF ) { if ( bSig ) return propagateFloat32NaN( a, b STATUS_VAR ); @@ -2238,7 +2241,7 @@ float32 float32_rem( float32 a, float32 if ( bExp == 0 ) { if ( bSig == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } normalizeFloat32Subnormal( bSig, &bExp, &bSig ); } @@ -2353,7 +2356,7 @@ float32 float32_muladd(float32 a, float3 if (infzero) { float_raise(float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if (flags & float_muladd_negate_c) { @@ -2374,7 +2377,7 @@ float32 float32_muladd(float32 a, float3 if (pInf && (pSign ^ cSign)) { /* addition of opposite-signed infinities => InvalidOperation */ float_raise(float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } /* Otherwise generate an infinity of the same sign */ return packFloat32(cSign ^ signflip, 0xff, 0); @@ -2548,12 +2551,12 @@ float32 float32_sqrt( float32 a STATUS_P if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR ); if ( ! aSign ) return a; float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if ( aSign ) { if ( ( aExp | aSig ) == 0 ) return a; float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if ( aExp == 0 ) { if ( aSig == 0 ) return float32_zero; @@ -2684,7 +2687,7 @@ float32 float32_log2( float32 a STATUS_P } if ( aSign ) { float_raise( float_flag_invalid STATUS_VAR); - return float32_default_nan(); + return float32_default_nan(status); } if ( aExp == 0xFF ) { if ( aSig ) return propagateFloat32NaN( a, float32_zero STATUS_VAR ); @@ -2828,8 +2831,9 @@ int float32_eq_quiet( float32 a, float32 if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float32_is_signaling_nan(a STATUS_VAR) || + float32_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -2854,8 +2858,9 @@ int float32_le_quiet( float32 a, float32 if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float32_is_signaling_nan(a STATUS_VAR) || + float32_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -2885,8 +2890,9 @@ int float32_lt_quiet( float32 a, float32 if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float32_is_signaling_nan(a STATUS_VAR) || + float32_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -2914,8 +2920,9 @@ int float32_unordered_quiet( float32 a, if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float32_is_signaling_nan(a STATUS_VAR) || + float32_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 1; } @@ -3166,7 +3173,8 @@ float32 float64_to_float32( float64 a ST if (aSig) { return float32_maybe_silence_nan( commonNaNToFloat32(float64ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat32( aSign, 0xFF, 0 ); } @@ -3336,7 +3344,8 @@ float32 float16_to_float32(float16 a, fl if (aSig) { return float32_maybe_silence_nan( commonNaNToFloat32(float16ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat32(aSign, 0xff, 0); } @@ -3371,7 +3380,8 @@ float16 float32_to_float16(float32 a, fl } return float16_maybe_silence_nan( commonNaNToFloat16(float32ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } /* Infinity */ if (!ieee) { @@ -3410,7 +3420,8 @@ float64 float16_to_float64(float16 a, fl if (aSig) { return float64_maybe_silence_nan( commonNaNToFloat64(float16ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat64(aSign, 0x7ff, 0); } @@ -3446,7 +3457,8 @@ float16 float64_to_float16(float64 a, fl } return float16_maybe_silence_nan( commonNaNToFloat16(float64ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } /* Infinity */ if (!ieee) { @@ -3494,7 +3506,8 @@ floatx80 float64_to_floatx80( float64 a if (aSig) { return floatx80_maybe_silence_nan( commonNaNToFloatx80(float64ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } @@ -3529,7 +3542,8 @@ float128 float64_to_float128( float64 a if (aSig) { return float128_maybe_silence_nan( commonNaNToFloat128(float64ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat128( aSign, 0x7FFF, 0, 0 ); } @@ -3740,7 +3754,7 @@ static float64 subFloat64Sigs( float64 a if ( aExp == 0x7FF ) { if ( aSig | bSig ) return propagateFloat64NaN( a, b STATUS_VAR ); float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if ( aExp == 0 ) { aExp = 1; @@ -3863,7 +3877,7 @@ float64 float64_mul( float64 a, float64 } if ( ( bExp | bSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } return packFloat64( zSign, 0x7FF, 0 ); } @@ -3871,7 +3885,7 @@ float64 float64_mul( float64 a, float64 if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR ); if ( ( aExp | aSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } return packFloat64( zSign, 0x7FF, 0 ); } @@ -3924,7 +3938,7 @@ float64 float64_div( float64 a, float64 if ( bExp == 0x7FF ) { if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR ); float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } return packFloat64( zSign, 0x7FF, 0 ); } @@ -3936,7 +3950,7 @@ float64 float64_div( float64 a, float64 if ( bSig == 0 ) { if ( ( aExp | aSig ) == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } float_raise( float_flag_divbyzero STATUS_VAR); return packFloat64( zSign, 0x7FF, 0 ); @@ -3994,7 +4008,7 @@ float64 float64_rem( float64 a, float64 return propagateFloat64NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if ( bExp == 0x7FF ) { if ( bSig ) return propagateFloat64NaN( a, b STATUS_VAR ); @@ -4003,7 +4017,7 @@ float64 float64_rem( float64 a, float64 if ( bExp == 0 ) { if ( bSig == 0 ) { float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } normalizeFloat64Subnormal( bSig, &bExp, &bSig ); } @@ -4104,7 +4118,7 @@ float64 float64_muladd(float64 a, float6 if (infzero) { float_raise(float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if (flags & float_muladd_negate_c) { @@ -4125,7 +4139,7 @@ float64 float64_muladd(float64 a, float6 if (pInf && (pSign ^ cSign)) { /* addition of opposite-signed infinities => InvalidOperation */ float_raise(float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } /* Otherwise generate an infinity of the same sign */ return packFloat64(cSign ^ signflip, 0x7ff, 0); @@ -4321,12 +4335,12 @@ float64 float64_sqrt( float64 a STATUS_P if ( aSig ) return propagateFloat64NaN( a, a STATUS_VAR ); if ( ! aSign ) return a; float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if ( aSign ) { if ( ( aExp | aSig ) == 0 ) return a; float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if ( aExp == 0 ) { if ( aSig == 0 ) return float64_zero; @@ -4374,7 +4388,7 @@ float64 float64_log2( float64 a STATUS_P } if ( aSign ) { float_raise( float_flag_invalid STATUS_VAR); - return float64_default_nan(); + return float64_default_nan(status); } if ( aExp == 0x7FF ) { if ( aSig ) return propagateFloat64NaN( a, float64_zero STATUS_VAR ); @@ -4519,8 +4533,9 @@ int float64_eq_quiet( float64 a, float64 if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float64_is_signaling_nan(a STATUS_VAR) || + float64_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -4547,8 +4562,9 @@ int float64_le_quiet( float64 a, float64 if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float64_is_signaling_nan(a STATUS_VAR) || + float64_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -4578,8 +4594,9 @@ int float64_lt_quiet( float64 a, float64 if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float64_is_signaling_nan(a STATUS_VAR) || + float64_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -4607,8 +4624,9 @@ int float64_unordered_quiet( float64 a, if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float64_is_signaling_nan(a STATUS_VAR) || + float64_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 1; } @@ -4791,7 +4809,8 @@ float32 floatx80_to_float32( floatx80 a if ((uint64_t)(aSig << 1)) { return float32_maybe_silence_nan( commonNaNToFloat32(floatx80ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat32( aSign, 0xFF, 0 ); } @@ -4821,7 +4840,8 @@ float64 floatx80_to_float64( floatx80 a if ((uint64_t)(aSig << 1)) { return float64_maybe_silence_nan( commonNaNToFloat64(floatx80ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat64( aSign, 0x7FF, 0 ); } @@ -4849,7 +4869,8 @@ float128 floatx80_to_float128( floatx80 aSign = extractFloatx80Sign( a ); if (aExp == 0x7FFF && (uint64_t)(aSig << 1)) { return float128_maybe_silence_nan( - commonNaNToFloat128(floatx80ToCommonNaN(a STATUS_VAR) STATUS_VAR)); + commonNaNToFloat128(floatx80ToCommonNaN(a STATUS_VAR) STATUS_VAR) + STATUS_VAR); } shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 ); return packFloat128( aSign, aExp, zSig0, zSig1 ); @@ -5040,7 +5061,7 @@ static floatx80 subFloatx80Sigs( floatx8 return propagateFloatx80NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); - return floatx80_default_nan(); + return floatx80_default_nan(status); } if ( aExp == 0 ) { aExp = 1; @@ -5153,7 +5174,7 @@ floatx80 floatx80_mul( floatx80 a, float if ( ( aExp | aSig ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return floatx80_default_nan(); + return floatx80_default_nan(status); } return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } @@ -5214,7 +5235,7 @@ floatx80 floatx80_div( floatx80 a, float if ( ( aExp | aSig ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return floatx80_default_nan(); + return floatx80_default_nan(status); } float_raise( float_flag_divbyzero STATUS_VAR); return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); @@ -5287,7 +5308,7 @@ floatx80 floatx80_rem( floatx80 a, float if ( bSig == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return floatx80_default_nan(); + return floatx80_default_nan(status); } normalizeFloatx80Subnormal( bSig, &bExp, &bSig ); } @@ -5372,7 +5393,7 @@ floatx80 floatx80_sqrt( floatx80 a STATU if ( ( aExp | aSig0 ) == 0 ) return a; invalid: float_raise( float_flag_invalid STATUS_VAR); - return floatx80_default_nan(); + return floatx80_default_nan(status); } if ( aExp == 0 ) { if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 ); @@ -5542,9 +5563,9 @@ int floatx80_eq_quiet( floatx80 a, float || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (floatx80_is_signaling_nan(a STATUS_VAR) || + floatx80_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -5573,9 +5594,9 @@ int floatx80_le_quiet( floatx80 a, float || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (floatx80_is_signaling_nan(a STATUS_VAR) || + floatx80_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -5609,9 +5630,9 @@ int floatx80_lt_quiet( floatx80 a, float || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (floatx80_is_signaling_nan(a STATUS_VAR) || + floatx80_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -5642,9 +5663,9 @@ int floatx80_unordered_quiet( floatx80 a || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (floatx80_is_signaling_nan(a STATUS_VAR) || + floatx80_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 1; } @@ -5854,7 +5875,8 @@ float32 float128_to_float32( float128 a if (aSig0 | aSig1) { return float32_maybe_silence_nan( commonNaNToFloat32(float128ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat32( aSign, 0xFF, 0 ); } @@ -5890,7 +5912,8 @@ float64 float128_to_float64( float128 a if (aSig0 | aSig1) { return float64_maybe_silence_nan( commonNaNToFloat64(float128ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloat64( aSign, 0x7FF, 0 ); } @@ -5925,7 +5948,8 @@ floatx80 float128_to_floatx80( float128 if (aSig0 | aSig1) { return floatx80_maybe_silence_nan( commonNaNToFloatx80(float128ToCommonNaN(a STATUS_VAR) - STATUS_VAR)); + STATUS_VAR) + STATUS_VAR); } return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) ); } @@ -6195,7 +6219,7 @@ static float128 subFloat128Sigs( float12 return propagateFloat128NaN( a, b STATUS_VAR ); } float_raise( float_flag_invalid STATUS_VAR); - return float128_default_nan(); + return float128_default_nan(status); } if ( aExp == 0 ) { aExp = 1; @@ -6322,7 +6346,7 @@ float128 float128_mul( float128 a, float if ( ( aExp | aSig0 | aSig1 ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return float128_default_nan(); + return float128_default_nan(status); } return packFloat128( zSign, 0x7FFF, 0, 0 ); } @@ -6388,7 +6412,7 @@ float128 float128_div( float128 a, float if ( ( aExp | aSig0 | aSig1 ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return float128_default_nan(); + return float128_default_nan(status); } float_raise( float_flag_divbyzero STATUS_VAR); return packFloat128( zSign, 0x7FFF, 0, 0 ); @@ -6466,7 +6490,7 @@ float128 float128_rem( float128 a, float if ( ( bSig0 | bSig1 ) == 0 ) { invalid: float_raise( float_flag_invalid STATUS_VAR); - return float128_default_nan(); + return float128_default_nan(status); } normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 ); } @@ -6562,7 +6586,7 @@ float128 float128_sqrt( float128 a STATU if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a; invalid: float_raise( float_flag_invalid STATUS_VAR); - return float128_default_nan(); + return float128_default_nan(status); } if ( aExp == 0 ) { if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 ); @@ -6730,9 +6754,9 @@ int float128_eq_quiet( float128 a, float || ( ( extractFloat128Exp( b ) == 0x7FFF ) && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) ) ) { - if ( float128_is_signaling_nan( a ) - || float128_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float128_is_signaling_nan(a STATUS_VAR) || + float128_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -6761,9 +6785,9 @@ int float128_le_quiet( float128 a, float || ( ( extractFloat128Exp( b ) == 0x7FFF ) && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) ) ) { - if ( float128_is_signaling_nan( a ) - || float128_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float128_is_signaling_nan(a STATUS_VAR) || + float128_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -6797,9 +6821,9 @@ int float128_lt_quiet( float128 a, float || ( ( extractFloat128Exp( b ) == 0x7FFF ) && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) ) ) { - if ( float128_is_signaling_nan( a ) - || float128_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float128_is_signaling_nan(a STATUS_VAR) || + float128_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 0; } @@ -6831,9 +6855,9 @@ int float128_unordered_quiet( float128 a || ( ( extractFloat128Exp( b ) == 0x7FFF ) && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) ) ) { - if ( float128_is_signaling_nan( a ) - || float128_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + if (float128_is_signaling_nan(a STATUS_VAR) || + float128_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return 1; } @@ -7111,9 +7135,9 @@ static inline int float ## s ## _compare ( ( extractFloat ## s ## Exp( b ) == nan_exp ) && \ extractFloat ## s ## Frac( b ) )) { \ if (!is_quiet || \ - float ## s ## _is_signaling_nan( a ) || \ - float ## s ## _is_signaling_nan( b ) ) { \ - float_raise( float_flag_invalid STATUS_VAR); \ + float ## s ## _is_signaling_nan(a STATUS_VAR) || \ + float ## s ## _is_signaling_nan(b STATUS_VAR)) { \ + float_raise(float_flag_invalid STATUS_VAR); \ } \ return float_relation_unordered; \ } \ @@ -7160,9 +7184,9 @@ static inline int floatx80_compare_inter ( ( extractFloatx80Exp( b ) == 0x7fff ) && ( extractFloatx80Frac( b )<<1 ) )) { if (!is_quiet || - floatx80_is_signaling_nan( a ) || - floatx80_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + floatx80_is_signaling_nan(a STATUS_VAR) || + floatx80_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return float_relation_unordered; } @@ -7206,9 +7230,9 @@ static inline int float128_compare_inter ( ( extractFloat128Exp( b ) == 0x7fff ) && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )) { if (!is_quiet || - float128_is_signaling_nan( a ) || - float128_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid STATUS_VAR); + float128_is_signaling_nan(a STATUS_VAR) || + float128_is_signaling_nan(b STATUS_VAR)) { + float_raise(float_flag_invalid STATUS_VAR); } return float_relation_unordered; } @@ -7266,10 +7290,10 @@ static inline float ## s float ## s ## _ if (float ## s ## _is_any_nan(a) || \ float ## s ## _is_any_nan(b)) { \ if (isieee) { \ - if (float ## s ## _is_quiet_nan(a) && \ + if (float ## s ## _is_quiet_nan(a STATUS_VAR) && \ !float ## s ##_is_any_nan(b)) { \ return b; \ - } else if (float ## s ## _is_quiet_nan(b) && \ + } else if (float ## s ## _is_quiet_nan(b STATUS_VAR) && \ !float ## s ## _is_any_nan(a)) { \ return a; \ } \ Index: qemu-git-trunk/include/fpu/softfloat.h =================================================================== --- qemu-git-trunk.orig/include/fpu/softfloat.h 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/include/fpu/softfloat.h 2014-12-08 22:40:14.768923514 +0000 @@ -64,7 +64,8 @@ typedef int64_t int64; #define LIT64( a ) a##LL -#define STATUS_PARAM , float_status *status +#define STATUS_PARAM_ONLY float_status *status +#define STATUS_PARAM , STATUS_PARAM_ONLY #define STATUS(field) status->field #define STATUS_VAR , status @@ -314,9 +315,9 @@ float64 float16_to_float64(float16 a, fl /*---------------------------------------------------------------------------- | Software half-precision operations. *----------------------------------------------------------------------------*/ -int float16_is_quiet_nan( float16 ); -int float16_is_signaling_nan( float16 ); -float16 float16_maybe_silence_nan( float16 ); +int float16_is_quiet_nan(float16 STATUS_PARAM); +int float16_is_signaling_nan(float16 STATUS_PARAM); +float16 float16_maybe_silence_nan(float16 STATUS_PARAM); static inline int float16_is_any_nan(float16 a) { @@ -326,7 +327,7 @@ static inline int float16_is_any_nan(flo /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ -__inline__ float16 float16_default_nan(void); +__inline__ float16 float16_default_nan(STATUS_PARAM_ONLY); /*---------------------------------------------------------------------------- | Software IEC/IEEE single-precision conversion routines. @@ -376,9 +377,9 @@ float32 float32_minnum(float32, float32 float32 float32_maxnum(float32, float32 STATUS_PARAM); float32 float32_minnummag(float32, float32 STATUS_PARAM); float32 float32_maxnummag(float32, float32 STATUS_PARAM); -int float32_is_quiet_nan( float32 ); -int float32_is_signaling_nan( float32 ); -float32 float32_maybe_silence_nan( float32 ); +int float32_is_quiet_nan(float32 STATUS_PARAM); +int float32_is_signaling_nan(float32 STATUS_PARAM); +float32 float32_maybe_silence_nan(float32 STATUS_PARAM); float32 float32_scalbn( float32, int STATUS_PARAM ); static inline float32 float32_abs(float32 a) @@ -438,7 +439,7 @@ static inline float32 float32_set_sign(f /*---------------------------------------------------------------------------- | The pattern for a default generated single-precision NaN. *----------------------------------------------------------------------------*/ -__inline__ float32 float32_default_nan(void); +__inline__ float32 float32_default_nan(STATUS_PARAM_ONLY); /*---------------------------------------------------------------------------- | Software IEC/IEEE double-precision conversion routines. @@ -488,9 +489,9 @@ float64 float64_minnum(float64, float64 float64 float64_maxnum(float64, float64 STATUS_PARAM); float64 float64_minnummag(float64, float64 STATUS_PARAM); float64 float64_maxnummag(float64, float64 STATUS_PARAM); -int float64_is_quiet_nan( float64 a ); -int float64_is_signaling_nan( float64 ); -float64 float64_maybe_silence_nan( float64 ); +int float64_is_quiet_nan(float64 a STATUS_PARAM); +int float64_is_signaling_nan(float64 STATUS_PARAM); +float64 float64_maybe_silence_nan(float64 STATUS_PARAM); float64 float64_scalbn( float64, int STATUS_PARAM ); static inline float64 float64_abs(float64 a) @@ -550,7 +551,7 @@ static inline float64 float64_set_sign(f /*---------------------------------------------------------------------------- | The pattern for a default generated double-precision NaN. *----------------------------------------------------------------------------*/ -__inline__ float64 float64_default_nan(void); +__inline__ float64 float64_default_nan(STATUS_PARAM_ONLY); /*---------------------------------------------------------------------------- | Software IEC/IEEE extended double-precision conversion routines. @@ -583,9 +584,9 @@ int floatx80_lt_quiet( floatx80, floatx8 int floatx80_unordered_quiet( floatx80, floatx80 STATUS_PARAM ); int floatx80_compare( floatx80, floatx80 STATUS_PARAM ); int floatx80_compare_quiet( floatx80, floatx80 STATUS_PARAM ); -int floatx80_is_quiet_nan( floatx80 ); -int floatx80_is_signaling_nan( floatx80 ); -floatx80 floatx80_maybe_silence_nan( floatx80 ); +int floatx80_is_quiet_nan(floatx80 STATUS_PARAM); +int floatx80_is_signaling_nan(floatx80 STATUS_PARAM); +floatx80 floatx80_maybe_silence_nan(floatx80 STATUS_PARAM); floatx80 floatx80_scalbn( floatx80, int STATUS_PARAM ); static inline floatx80 floatx80_abs(floatx80 a) @@ -635,7 +636,7 @@ static inline int floatx80_is_any_nan(fl /*---------------------------------------------------------------------------- | The pattern for a default generated extended double-precision NaN. *----------------------------------------------------------------------------*/ -__inline__ floatx80 floatx80_default_nan(void); +__inline__ floatx80 floatx80_default_nan(STATUS_PARAM_ONLY); /*---------------------------------------------------------------------------- | Software IEC/IEEE quadruple-precision conversion routines. @@ -668,9 +669,9 @@ int float128_lt_quiet( float128, float12 int float128_unordered_quiet( float128, float128 STATUS_PARAM ); int float128_compare( float128, float128 STATUS_PARAM ); int float128_compare_quiet( float128, float128 STATUS_PARAM ); -int float128_is_quiet_nan( float128 ); -int float128_is_signaling_nan( float128 ); -float128 float128_maybe_silence_nan( float128 ); +int float128_is_quiet_nan(float128 STATUS_PARAM); +int float128_is_signaling_nan(float128 STATUS_PARAM); +float128 float128_maybe_silence_nan(float128 STATUS_PARAM); float128 float128_scalbn( float128, int STATUS_PARAM ); static inline float128 float128_abs(float128 a) @@ -716,6 +717,6 @@ static inline int float128_is_any_nan(fl /*---------------------------------------------------------------------------- | The pattern for a default generated quadruple-precision NaN. *----------------------------------------------------------------------------*/ -__inline__ float128 float128_default_nan(void); +__inline__ float128 float128_default_nan(STATUS_PARAM_ONLY); #endif /* !SOFTFLOAT_H */ Index: qemu-git-trunk/target-arm/helper-a64.c =================================================================== --- qemu-git-trunk.orig/target-arm/helper-a64.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-arm/helper-a64.c 2014-12-08 22:37:36.758946934 +0000 @@ -337,12 +337,12 @@ float32 HELPER(frecpx_f32)(float32 a, vo if (float32_is_any_nan(a)) { float32 nan = a; - if (float32_is_signaling_nan(a)) { + if (float32_is_signaling_nan(a, fpst)) { float_raise(float_flag_invalid, fpst); - nan = float32_maybe_silence_nan(a); + nan = float32_maybe_silence_nan(a, fpst); } if (fpst->default_nan_mode) { - nan = float32_default_nan(); + nan = float32_default_nan(fpst); } return nan; } @@ -366,12 +366,12 @@ float64 HELPER(frecpx_f64)(float64 a, vo if (float64_is_any_nan(a)) { float64 nan = a; - if (float64_is_signaling_nan(a)) { + if (float64_is_signaling_nan(a, fpst)) { float_raise(float_flag_invalid, fpst); - nan = float64_maybe_silence_nan(a); + nan = float64_maybe_silence_nan(a, fpst); } if (fpst->default_nan_mode) { - nan = float64_default_nan(); + nan = float64_default_nan(fpst); } return nan; } @@ -400,7 +400,7 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 set_float_rounding_mode(float_round_to_zero, &tstat); set_float_exception_flags(0, &tstat); r = float64_to_float32(a, &tstat); - r = float32_maybe_silence_nan(r); + r = float32_maybe_silence_nan(r, &tstat); exflags = get_float_exception_flags(&tstat); if (exflags & float_flag_inexact) { r = make_float32(float32_val(r) | 1); Index: qemu-git-trunk/target-arm/helper.c =================================================================== --- qemu-git-trunk.orig/target-arm/helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-arm/helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -5523,7 +5523,7 @@ float64 VFP_HELPER(fcvtd, s)(float32 x, /* ARM requires that S<->D conversion of any kind of NaN generates * a quiet NaN by forcing the most significant frac bit to 1. */ - return float64_maybe_silence_nan(r); + return float64_maybe_silence_nan(r, &env->vfp.fp_status); } float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env) @@ -5532,7 +5532,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, /* ARM requires that S<->D conversion of any kind of NaN generates * a quiet NaN by forcing the most significant frac bit to 1. */ - return float32_maybe_silence_nan(r); + return float32_maybe_silence_nan(r, &env->vfp.fp_status); } /* VFP3 fixed point conversion. */ @@ -5631,7 +5631,7 @@ static float32 do_fcvt_f16_to_f32(uint32 int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; float32 r = float16_to_float32(make_float16(a), ieee, s); if (ieee) { - return float32_maybe_silence_nan(r); + return float32_maybe_silence_nan(r, s); } return r; } @@ -5641,7 +5641,7 @@ static uint32_t do_fcvt_f32_to_f16(float int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; float16 r = float32_to_float16(a, ieee, s); if (ieee) { - r = float16_maybe_silence_nan(r); + r = float16_maybe_silence_nan(r, s); } return float16_val(r); } @@ -5671,7 +5671,7 @@ float64 HELPER(vfp_fcvt_f16_to_f64)(uint int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; float64 r = float16_to_float64(make_float16(a), ieee, &env->vfp.fp_status); if (ieee) { - return float64_maybe_silence_nan(r); + return float64_maybe_silence_nan(r, &env->vfp.fp_status); } return r; } @@ -5681,7 +5681,7 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(flo int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; float16 r = float64_to_float16(a, ieee, &env->vfp.fp_status); if (ieee) { - r = float16_maybe_silence_nan(r); + r = float16_maybe_silence_nan(r, &env->vfp.fp_status); } return float16_val(r); } @@ -5831,12 +5831,12 @@ float32 HELPER(recpe_f32)(float32 input, if (float32_is_any_nan(f32)) { float32 nan = f32; - if (float32_is_signaling_nan(f32)) { + if (float32_is_signaling_nan(f32, fpst)) { float_raise(float_flag_invalid, fpst); - nan = float32_maybe_silence_nan(f32); + nan = float32_maybe_silence_nan(f32, fpst); } if (fpst->default_nan_mode) { - nan = float32_default_nan(); + nan = float32_default_nan(fpst); } return nan; } else if (float32_is_infinity(f32)) { @@ -5885,12 +5885,12 @@ float64 HELPER(recpe_f64)(float64 input, /* Deal with any special cases */ if (float64_is_any_nan(f64)) { float64 nan = f64; - if (float64_is_signaling_nan(f64)) { + if (float64_is_signaling_nan(f64, fpst)) { float_raise(float_flag_invalid, fpst); - nan = float64_maybe_silence_nan(f64); + nan = float64_maybe_silence_nan(f64, fpst); } if (fpst->default_nan_mode) { - nan = float64_default_nan(); + nan = float64_default_nan(fpst); } return nan; } else if (float64_is_infinity(f64)) { @@ -5992,12 +5992,12 @@ float32 HELPER(rsqrte_f32)(float32 input if (float32_is_any_nan(f32)) { float32 nan = f32; - if (float32_is_signaling_nan(f32)) { + if (float32_is_signaling_nan(f32, s)) { float_raise(float_flag_invalid, s); - nan = float32_maybe_silence_nan(f32); + nan = float32_maybe_silence_nan(f32, s); } if (s->default_nan_mode) { - nan = float32_default_nan(); + nan = float32_default_nan(s); } return nan; } else if (float32_is_zero(f32)) { @@ -6005,7 +6005,7 @@ float32 HELPER(rsqrte_f32)(float32 input return float32_set_sign(float32_infinity, float32_is_neg(f32)); } else if (float32_is_neg(f32)) { float_raise(float_flag_invalid, s); - return float32_default_nan(); + return float32_default_nan(s); } else if (float32_is_infinity(f32)) { return float32_zero; } @@ -6056,12 +6056,12 @@ float64 HELPER(rsqrte_f64)(float64 input if (float64_is_any_nan(f64)) { float64 nan = f64; - if (float64_is_signaling_nan(f64)) { + if (float64_is_signaling_nan(f64, s)) { float_raise(float_flag_invalid, s); - nan = float64_maybe_silence_nan(f64); + nan = float64_maybe_silence_nan(f64, s); } if (s->default_nan_mode) { - nan = float64_default_nan(); + nan = float64_default_nan(s); } return nan; } else if (float64_is_zero(f64)) { @@ -6069,7 +6069,7 @@ float64 HELPER(rsqrte_f64)(float64 input return float64_set_sign(float64_infinity, float64_is_neg(f64)); } else if (float64_is_neg(f64)) { float_raise(float_flag_invalid, s); - return float64_default_nan(); + return float64_default_nan(s); } else if (float64_is_infinity(f64)) { return float64_zero; } Index: qemu-git-trunk/target-m68k/helper.c =================================================================== --- qemu-git-trunk.orig/target-m68k/helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-m68k/helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -556,10 +556,10 @@ float64 HELPER(sub_cmp_f64)(CPUM68KState /* ??? Should flush denormals to zero. */ float64 res; res = float64_sub(a, b, &env->fp_status); - if (float64_is_quiet_nan(res)) { + if (float64_is_quiet_nan(res, &env->fp_status)) { /* +/-inf compares equal against itself, but sub returns nan. */ - if (!float64_is_quiet_nan(a) - && !float64_is_quiet_nan(b)) { + if (!float64_is_quiet_nan(a, &env->fp_status) + && !float64_is_quiet_nan(b, &env->fp_status)) { res = float64_zero; if (float64_lt_quiet(a, res, &env->fp_status)) res = float64_chs(res); Index: qemu-git-trunk/target-microblaze/op_helper.c =================================================================== --- qemu-git-trunk.orig/target-microblaze/op_helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-microblaze/op_helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -289,12 +289,14 @@ uint32_t helper_fcmp_un(CPUMBState *env, fa.l = a; fb.l = b; - if (float32_is_signaling_nan(fa.f) || float32_is_signaling_nan(fb.f)) { + if (float32_is_signaling_nan(fa.f, &env->fp_status) + || float32_is_signaling_nan(fb.f, &env->fp_status)) { update_fpu_flags(env, float_flag_invalid); r = 1; } - if (float32_is_quiet_nan(fa.f) || float32_is_quiet_nan(fb.f)) { + if (float32_is_quiet_nan(fa.f, &env->fp_status) || + float32_is_quiet_nan(fb.f, &env->fp_status)) { r = 1; } Index: qemu-git-trunk/target-mips/helper.h =================================================================== --- qemu-git-trunk.orig/target-mips/helper.h 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-mips/helper.h 2014-12-08 22:37:36.758946934 +0000 @@ -209,8 +209,8 @@ DEF_HELPER_2(float_cvtw_d, i32, env, i64 DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) -DEF_HELPER_FLAGS_1(float_class_s, TCG_CALL_NO_RWG_SE, i32, i32) -DEF_HELPER_FLAGS_1(float_class_d, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_FLAGS_3(float_class_s, TCG_CALL_NO_RWG_SE, i32, env, i32, i32) +DEF_HELPER_FLAGS_3(float_class_d, TCG_CALL_NO_RWG_SE, i64, env, i64, i32) #define FOP_PROTO(op) \ DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ Index: qemu-git-trunk/target-mips/msa_helper.c =================================================================== --- qemu-git-trunk.orig/target-mips/msa_helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-mips/msa_helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -1503,11 +1503,11 @@ MSA_UNOP_DF(pcnt) #define FLOAT_ONE32 make_float32(0x3f8 << 20) #define FLOAT_ONE64 make_float64(0x3ffULL << 52) -#define FLOAT_SNAN16 (float16_default_nan() ^ 0x0220) +#define FLOAT_SNAN16(s) (float16_default_nan(s) ^ 0x0220) /* 0x7c20 */ -#define FLOAT_SNAN32 (float32_default_nan() ^ 0x00400020) +#define FLOAT_SNAN32(s) (float32_default_nan(s) ^ 0x00400020) /* 0x7f800020 */ -#define FLOAT_SNAN64 (float64_default_nan() ^ 0x0008000000000020ULL) +#define FLOAT_SNAN64(s) (float64_default_nan(s) ^ 0x0008000000000020ULL) /* 0x7ff0000000000020 */ static inline void clear_msacsr_cause(CPUMIPSState *env) @@ -1619,7 +1619,7 @@ static inline float16 float16_from_float float16 f_val; f_val = float32_to_float16((float32)a, ieee STATUS_VAR); - f_val = float16_maybe_silence_nan(f_val); + f_val = float16_maybe_silence_nan(f_val STATUS_VAR); return a < 0 ? (f_val | (1 << 15)) : f_val; } @@ -1629,7 +1629,7 @@ static inline float32 float32_from_float float32 f_val; f_val = float64_to_float32((float64)a STATUS_VAR); - f_val = float32_maybe_silence_nan(f_val); + f_val = float32_maybe_silence_nan(f_val STATUS_VAR); return a < 0 ? (f_val | (1 << 31)) : f_val; } @@ -1639,7 +1639,7 @@ static inline float32 float32_from_float float32 f_val; f_val = float16_to_float32((float16)a, ieee STATUS_VAR); - f_val = float32_maybe_silence_nan(f_val); + f_val = float32_maybe_silence_nan(f_val STATUS_VAR); return a < 0 ? (f_val | (1 << 31)) : f_val; } @@ -1649,7 +1649,7 @@ static inline float64 float64_from_float float64 f_val; f_val = float32_to_float64((float64)a STATUS_VAR); - f_val = float64_maybe_silence_nan(f_val); + f_val = float64_maybe_silence_nan(f_val STATUS_VAR); return a < 0 ? (f_val | (1ULL << 63)) : f_val; } @@ -1795,7 +1795,7 @@ static inline int32 float64_to_q32(float c = update_msacsr(env, CLEAR_IS_INEXACT, 0); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -2382,7 +2382,7 @@ void helper_msa_fsne_df(CPUMIPSState *en c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -2518,7 +2518,7 @@ void helper_msa_fdiv_df(CPUMIPSState *en c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -2637,7 +2637,7 @@ void helper_msa_fexp2_df(CPUMIPSState *e c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -2686,7 +2686,7 @@ void helper_msa_fexdo_df(CPUMIPSState *e c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## XBITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## XBITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -2723,9 +2723,9 @@ void helper_msa_ftq_df(CPUMIPSState *env msa_move_v(pwd, pwx); } -#define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS) \ - !float ## BITS ## _is_any_nan(ARG1) \ - && float ## BITS ## _is_quiet_nan(ARG2) +#define NUMBER_QNAN_PAIR(ARG1, ARG2, BITS, STATUS) \ + !float ## BITS ## _is_any_nan(ARG1) \ + && float ## BITS ## _is_quiet_nan(ARG2, STATUS) #define MSA_FLOAT_MAXOP(DEST, OP, ARG1, ARG2, BITS) \ do { \ @@ -2737,18 +2737,18 @@ void helper_msa_ftq_df(CPUMIPSState *env c = update_msacsr(env, 0, 0); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) -#define FMAXMIN_A(F, G, X, _S, _T, BITS) \ +#define FMAXMIN_A(F, G, X, _S, _T, BITS, STATUS) \ do { \ uint## BITS ##_t S = _S, T = _T; \ uint## BITS ##_t as, at, xs, xt, xd; \ - if (NUMBER_QNAN_PAIR(S, T, BITS)) { \ + if (NUMBER_QNAN_PAIR(S, T, BITS, STATUS)) { \ T = S; \ } \ - else if (NUMBER_QNAN_PAIR(T, S, BITS)) { \ + else if (NUMBER_QNAN_PAIR(T, S, BITS, STATUS)) { \ S = T; \ } \ as = float## BITS ##_abs(S); \ @@ -2762,6 +2762,7 @@ void helper_msa_ftq_df(CPUMIPSState *env void helper_msa_fmin_df(CPUMIPSState *env, uint32_t df, uint32_t wd, uint32_t ws, uint32_t wt) { + float_status *status = &env->active_tc.msa_fp_status; wr_t wx, *pwx = &wx; wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr); @@ -2773,9 +2774,9 @@ void helper_msa_fmin_df(CPUMIPSState *en switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { - if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { + if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) { MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pws->w[i], 32); - } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { + } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) { MSA_FLOAT_MAXOP(pwx->w[i], min, pwt->w[i], pwt->w[i], 32); } else { MSA_FLOAT_MAXOP(pwx->w[i], min, pws->w[i], pwt->w[i], 32); @@ -2784,9 +2785,9 @@ void helper_msa_fmin_df(CPUMIPSState *en break; case DF_DOUBLE: for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { - if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { + if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) { MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pws->d[i], 64); - } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { + } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) { MSA_FLOAT_MAXOP(pwx->d[i], min, pwt->d[i], pwt->d[i], 64); } else { MSA_FLOAT_MAXOP(pwx->d[i], min, pws->d[i], pwt->d[i], 64); @@ -2805,6 +2806,7 @@ void helper_msa_fmin_df(CPUMIPSState *en void helper_msa_fmin_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, uint32_t ws, uint32_t wt) { + float_status *status = &env->active_tc.msa_fp_status; wr_t wx, *pwx = &wx; wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr); @@ -2816,12 +2818,12 @@ void helper_msa_fmin_a_df(CPUMIPSState * switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { - FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32); + FMAXMIN_A(min, max, pwx->w[i], pws->w[i], pwt->w[i], 32, status); } break; case DF_DOUBLE: for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { - FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64); + FMAXMIN_A(min, max, pwx->d[i], pws->d[i], pwt->d[i], 64, status); } break; default: @@ -2836,6 +2838,7 @@ void helper_msa_fmin_a_df(CPUMIPSState * void helper_msa_fmax_df(CPUMIPSState *env, uint32_t df, uint32_t wd, uint32_t ws, uint32_t wt) { + float_status *status = &env->active_tc.msa_fp_status; wr_t wx, *pwx = &wx; wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr); @@ -2847,9 +2850,9 @@ void helper_msa_fmax_df(CPUMIPSState *en switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { - if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32)) { + if (NUMBER_QNAN_PAIR(pws->w[i], pwt->w[i], 32, status)) { MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pws->w[i], 32); - } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32)) { + } else if (NUMBER_QNAN_PAIR(pwt->w[i], pws->w[i], 32, status)) { MSA_FLOAT_MAXOP(pwx->w[i], max, pwt->w[i], pwt->w[i], 32); } else { MSA_FLOAT_MAXOP(pwx->w[i], max, pws->w[i], pwt->w[i], 32); @@ -2858,9 +2861,9 @@ void helper_msa_fmax_df(CPUMIPSState *en break; case DF_DOUBLE: for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { - if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64)) { + if (NUMBER_QNAN_PAIR(pws->d[i], pwt->d[i], 64, status)) { MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pws->d[i], 64); - } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64)) { + } else if (NUMBER_QNAN_PAIR(pwt->d[i], pws->d[i], 64, status)) { MSA_FLOAT_MAXOP(pwx->d[i], max, pwt->d[i], pwt->d[i], 64); } else { MSA_FLOAT_MAXOP(pwx->d[i], max, pws->d[i], pwt->d[i], 64); @@ -2879,6 +2882,7 @@ void helper_msa_fmax_df(CPUMIPSState *en void helper_msa_fmax_a_df(CPUMIPSState *env, uint32_t df, uint32_t wd, uint32_t ws, uint32_t wt) { + float_status *status = &env->active_tc.msa_fp_status; wr_t wx, *pwx = &wx; wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr); @@ -2890,12 +2894,12 @@ void helper_msa_fmax_a_df(CPUMIPSState * switch (df) { case DF_WORD: for (i = 0; i < DF_ELEMENTS(DF_WORD); i++) { - FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32); + FMAXMIN_A(max, min, pwx->w[i], pws->w[i], pwt->w[i], 32, status); } break; case DF_DOUBLE: for (i = 0; i < DF_ELEMENTS(DF_DOUBLE); i++) { - FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64); + FMAXMIN_A(max, min, pwx->d[i], pws->d[i], pwt->d[i], 64, status); } break; default: @@ -2913,13 +2917,13 @@ void helper_msa_fclass_df(CPUMIPSState * wr_t *pwd = &(env->active_fpu.fpr[wd].wr); wr_t *pws = &(env->active_fpu.fpr[ws].wr); if (df == DF_WORD) { - pwd->w[0] = helper_float_class_s(pws->w[0]); - pwd->w[1] = helper_float_class_s(pws->w[1]); - pwd->w[2] = helper_float_class_s(pws->w[2]); - pwd->w[3] = helper_float_class_s(pws->w[3]); + pwd->w[0] = helper_float_class_s(env, pws->w[0], 1); + pwd->w[1] = helper_float_class_s(env, pws->w[1], 1); + pwd->w[2] = helper_float_class_s(env, pws->w[2], 1); + pwd->w[3] = helper_float_class_s(env, pws->w[3], 1); } else { - pwd->d[0] = helper_float_class_d(pws->d[0]); - pwd->d[1] = helper_float_class_d(pws->d[1]); + pwd->d[0] = helper_float_class_d(env, pws->d[0], 1); + pwd->d[1] = helper_float_class_d(env, pws->d[1], 1); } } @@ -2933,7 +2937,7 @@ void helper_msa_fclass_df(CPUMIPSState * c = update_msacsr(env, CLEAR_FS_UNDERFLOW, 0); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } else if (float ## BITS ## _is_any_nan(ARG)) { \ DEST = 0; \ } \ @@ -3037,12 +3041,12 @@ void helper_msa_fsqrt_df(CPUMIPSState *e set_float_exception_flags(0, status); \ DEST = float ## BITS ## _ ## div(FLOAT_ONE ## BITS, ARG, status); \ c = update_msacsr(env, float ## BITS ## _is_infinity(ARG) || \ - float ## BITS ## _is_quiet_nan(DEST) ? \ + float ## BITS ## _is_quiet_nan(DEST, status) ? \ 0 : RECIPROCAL_INEXACT, \ IS_DENORMAL(DEST, BITS)); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) @@ -3158,7 +3162,7 @@ void helper_msa_frint_df(CPUMIPSState *e c = update_msacsr(env, 0, IS_DENORMAL(DEST, BITS)); \ \ if (get_enabled_exceptions(env, c)) { \ - DEST = ((FLOAT_SNAN ## BITS >> 6) << 6) | c; \ + DEST = ((FLOAT_SNAN ## BITS(status) >> 6) << 6) | c; \ } \ } while (0) Index: qemu-git-trunk/target-mips/op_helper.c =================================================================== --- qemu-git-trunk.orig/target-mips/op_helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-mips/op_helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -2990,11 +2990,17 @@ FLOAT_RINT(rint_d, 64) #define FLOAT_CLASS_POSITIVE_ZERO 0x200 #define FLOAT_CLASS(name, bits) \ -uint ## bits ## _t helper_float_ ## name (uint ## bits ## _t arg) \ +uint ## bits ## _t helper_float_ ## name (CPUMIPSState *env, \ + uint ## bits ## _t arg, \ + uint32_t msa) \ { \ - if (float ## bits ## _is_signaling_nan(arg)) { \ + float_status *status = msa ? \ + &env->active_tc.msa_fp_status : \ + &env->active_fpu.fp_status; \ + \ + if (float ## bits ## _is_signaling_nan(arg, status)) { \ return FLOAT_CLASS_SIGNALING_NAN; \ - } else if (float ## bits ## _is_quiet_nan(arg)) { \ + } else if (float ## bits ## _is_quiet_nan(arg, status)) { \ return FLOAT_CLASS_QUIET_NAN; \ } else if (float ## bits ## _is_neg(arg)) { \ if (float ## bits ## _is_infinity(arg)) { \ Index: qemu-git-trunk/target-mips/translate.c =================================================================== --- qemu-git-trunk.orig/target-mips/translate.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-mips/translate.c 2014-12-08 22:37:36.758946934 +0000 @@ -8972,9 +8972,11 @@ static void gen_farith (DisasContext *ct check_insn(ctx, ISA_MIPS32R6); { TCGv_i32 fp0 = tcg_temp_new_i32(); + TCGv_i32 msa = tcg_const_i32(0); gen_load_fpr32(fp0, fs); - gen_helper_float_class_s(fp0, fp0); + gen_helper_float_class_s(fp0, cpu_env, fp0, msa); gen_store_fpr32(fp0, fd); + tcg_temp_free_i32(msa); tcg_temp_free_i32(fp0); opn = "class.s"; } @@ -9517,9 +9519,11 @@ static void gen_farith (DisasContext *ct check_insn(ctx, ISA_MIPS32R6); { TCGv_i64 fp0 = tcg_temp_new_i64(); + TCGv_i32 msa = tcg_const_i32(0); gen_load_fpr64(ctx, fp0, fs); - gen_helper_float_class_d(fp0, fp0); + gen_helper_float_class_d(fp0, cpu_env, fp0, msa); gen_store_fpr64(ctx, fp0, fd); + tcg_temp_free_i32(msa); tcg_temp_free_i64(fp0); opn = "class.d"; } Index: qemu-git-trunk/target-ppc/fpu_helper.c =================================================================== --- qemu-git-trunk.orig/target-ppc/fpu_helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-ppc/fpu_helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -69,7 +69,7 @@ uint32_t helper_compute_fprf(CPUPPCState farg.ll = arg; isneg = float64_is_neg(farg.d); if (unlikely(float64_is_any_nan(farg.d))) { - if (float64_is_signaling_nan(farg.d)) { + if (float64_is_signaling_nan(farg.d, &env->fp_status)) { /* Signaling NaN: flags are undefined */ ret = 0x00; } else { @@ -534,8 +534,8 @@ uint64_t helper_fadd(CPUPPCState *env, u /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status))) { /* sNaN addition */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -558,8 +558,8 @@ uint64_t helper_fsub(CPUPPCState *env, u /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status))) { /* sNaN subtraction */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -582,8 +582,8 @@ uint64_t helper_fmul(CPUPPCState *env, u /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status))) { /* sNaN multiplication */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -609,8 +609,8 @@ uint64_t helper_fdiv(CPUPPCState *env, u /* Division of zero by zero */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXZDZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status))) { /* sNaN division */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -632,7 +632,7 @@ uint64_t helper_##op(CPUPPCState *env, u if (unlikely(env->fp_status.float_exception_flags)) { \ if (float64_is_any_nan(arg)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 1); \ - if (float64_is_signaling_nan(arg)) { \ + if (float64_is_signaling_nan(arg, &env->fp_status)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); \ } \ farg.ll = nanval; \ @@ -681,7 +681,7 @@ static inline uint64_t do_fri(CPUPPCStat farg.ll = arg; - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN round */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); farg.ll = arg | 0x0008000000000000ULL; @@ -737,9 +737,9 @@ uint64_t helper_fmadd(CPUPPCState *env, /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d) || - float64_is_signaling_nan(farg3.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status) || + float64_is_signaling_nan(farg3.d, &env->fp_status))) { /* sNaN operation */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -780,9 +780,9 @@ uint64_t helper_fmsub(CPUPPCState *env, /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d) || - float64_is_signaling_nan(farg3.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status) || + float64_is_signaling_nan(farg3.d, &env->fp_status))) { /* sNaN operation */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -821,9 +821,9 @@ uint64_t helper_fnmadd(CPUPPCState *env, /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d) || - float64_is_signaling_nan(farg3.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status) || + float64_is_signaling_nan(farg3.d, &env->fp_status))) { /* sNaN operation */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -866,9 +866,9 @@ uint64_t helper_fnmsub(CPUPPCState *env, /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); } else { - if (unlikely(float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d) || - float64_is_signaling_nan(farg3.d))) { + if (unlikely(float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status) || + float64_is_signaling_nan(farg3.d, &env->fp_status))) { /* sNaN operation */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -903,7 +903,7 @@ uint64_t helper_frsp(CPUPPCState *env, u farg.ll = arg; - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN square root */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -924,7 +924,7 @@ uint64_t helper_fsqrt(CPUPPCState *env, /* Square root of a negative nonzero number */ farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); } else { - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN square root */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -940,7 +940,7 @@ uint64_t helper_fre(CPUPPCState *env, ui farg.ll = arg; - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN reciprocal */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -956,7 +956,7 @@ uint64_t helper_fres(CPUPPCState *env, u farg.ll = arg; - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN reciprocal */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -978,7 +978,7 @@ uint64_t helper_frsqrte(CPUPPCState *env /* Reciprocal square root of a negative nonzero number */ farg.ll = fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1); } else { - if (unlikely(float64_is_signaling_nan(farg.d))) { + if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) { /* sNaN reciprocal square root */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -1095,8 +1095,8 @@ void helper_fcmpu(CPUPPCState *env, uint env->fpscr |= ret << FPSCR_FPRF; env->crf[crfD] = ret; if (unlikely(ret == 0x01UL - && (float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d)))) { + && (float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status)))) { /* sNaN comparison */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); } @@ -1126,8 +1126,8 @@ void helper_fcmpo(CPUPPCState *env, uint env->fpscr |= ret << FPSCR_FPRF; env->crf[crfD] = ret; if (unlikely(ret == 0x01UL)) { - if (float64_is_signaling_nan(farg1.d) || - float64_is_signaling_nan(farg2.d)) { + if (float64_is_signaling_nan(farg1.d, &env->fp_status) || + float64_is_signaling_nan(farg2.d, &env->fp_status)) { /* sNaN comparison */ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXVC, 1); @@ -1163,7 +1163,7 @@ static inline int32_t efsctsi(CPUPPCStat u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } @@ -1176,7 +1176,7 @@ static inline uint32_t efsctui(CPUPPCSta u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } @@ -1189,7 +1189,7 @@ static inline uint32_t efsctsiz(CPUPPCSt u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } @@ -1202,7 +1202,7 @@ static inline uint32_t efsctuiz(CPUPPCSt u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } @@ -1240,7 +1240,7 @@ static inline uint32_t efsctsf(CPUPPCSta u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } tmp = uint64_to_float32(1ULL << 32, &env->vec_status); @@ -1256,7 +1256,7 @@ static inline uint32_t efsctuf(CPUPPCSta u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) { + if (unlikely(float32_is_quiet_nan(u.f, &env->vec_status))) { return 0; } tmp = uint64_to_float32(1ULL << 32, &env->vec_status); @@ -1834,8 +1834,8 @@ void helper_##name(CPUPPCState *env, uin if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ if (tp##_is_infinity(xa.fld) && tp##_is_infinity(xb.fld)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, sfprf); \ - } else if (tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(xb.fld)) { \ + } else if (tp##_is_signaling_nan(xa.fld, &tstat) || \ + tp##_is_signaling_nan(xb.fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ } \ @@ -1889,8 +1889,8 @@ void helper_##op(CPUPPCState *env, uint3 if ((tp##_is_infinity(xa.fld) && tp##_is_zero(xb.fld)) || \ (tp##_is_infinity(xb.fld) && tp##_is_zero(xa.fld))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, sfprf); \ - } else if (tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(xb.fld)) { \ + } else if (tp##_is_signaling_nan(xa.fld, &tstat) || \ + tp##_is_signaling_nan(xb.fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ } \ @@ -1943,8 +1943,8 @@ void helper_##op(CPUPPCState *env, uint3 } else if (tp##_is_zero(xa.fld) && \ tp##_is_zero(xb.fld)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXZDZ, sfprf); \ - } else if (tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(xb.fld)) { \ + } else if (tp##_is_signaling_nan(xa.fld, &tstat) || \ + tp##_is_signaling_nan(xb.fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ } \ @@ -1985,7 +1985,7 @@ void helper_##op(CPUPPCState *env, uint3 helper_reset_fpstatus(env); \ \ for (i = 0; i < nels; i++) { \ - if (unlikely(tp##_is_signaling_nan(xb.fld))) { \ + if (unlikely(tp##_is_signaling_nan(xb.fld, &env->fp_status))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ xt.fld = tp##_div(tp##_one, xb.fld, &env->fp_status); \ @@ -2034,7 +2034,7 @@ void helper_##op(CPUPPCState *env, uint3 if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ if (tp##_is_neg(xb.fld) && !tp##_is_zero(xb.fld)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, sfprf); \ - } else if (tp##_is_signaling_nan(xb.fld)) { \ + } else if (tp##_is_signaling_nan(xb.fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ } \ @@ -2084,7 +2084,7 @@ void helper_##op(CPUPPCState *env, uint3 if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ if (tp##_is_neg(xb.fld) && !tp##_is_zero(xb.fld)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, sfprf); \ - } else if (tp##_is_signaling_nan(xb.fld)) { \ + } else if (tp##_is_signaling_nan(xb.fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ } \ } \ @@ -2269,9 +2269,9 @@ void helper_##op(CPUPPCState *env, uint3 env->fp_status.float_exception_flags |= tstat.float_exception_flags; \ \ if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ - if (tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(b->fld) || \ - tp##_is_signaling_nan(c->fld)) { \ + if (tp##_is_signaling_nan(xa.fld, &tstat) || \ + tp##_is_signaling_nan(b->fld, &tstat) || \ + tp##_is_signaling_nan(c->fld, &tstat)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, sfprf); \ tstat.float_exception_flags &= ~float_flag_invalid; \ } \ @@ -2353,8 +2353,8 @@ void helper_##op(CPUPPCState *env, uint3 \ if (unlikely(float64_is_any_nan(xa.VsrD(0)) || \ float64_is_any_nan(xb.VsrD(0)))) { \ - if (float64_is_signaling_nan(xa.VsrD(0)) || \ - float64_is_signaling_nan(xb.VsrD(0))) { \ + if (float64_is_signaling_nan(xa.VsrD(0), &env->fp_status) || \ + float64_is_signaling_nan(xb.VsrD(0), &env->fp_status)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ } \ if (ordered) { \ @@ -2404,8 +2404,8 @@ void helper_##name(CPUPPCState *env, uin \ for (i = 0; i < nels; i++) { \ xt.fld = tp##_##op(xa.fld, xb.fld, &env->fp_status); \ - if (unlikely(tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(xb.fld))) { \ + if (unlikely(tp##_is_signaling_nan(xa.fld, &env->fp_status) || \ + tp##_is_signaling_nan(xb.fld, &env->fp_status))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ } \ } \ @@ -2444,8 +2444,8 @@ void helper_##op(CPUPPCState *env, uint3 for (i = 0; i < nels; i++) { \ if (unlikely(tp##_is_any_nan(xa.fld) || \ tp##_is_any_nan(xb.fld))) { \ - if (tp##_is_signaling_nan(xa.fld) || \ - tp##_is_signaling_nan(xb.fld)) { \ + if (tp##_is_signaling_nan(xa.fld, &env->fp_status) || \ + tp##_is_signaling_nan(xb.fld, &env->fp_status)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ } \ if (svxvc) { \ @@ -2498,7 +2498,8 @@ void helper_##op(CPUPPCState *env, uint3 \ for (i = 0; i < nels; i++) { \ xt.tfld = stp##_to_##ttp(xb.sfld, &env->fp_status); \ - if (unlikely(stp##_is_signaling_nan(xb.sfld))) { \ + if (unlikely(stp##_is_signaling_nan(xb.sfld, \ + &env->fp_status))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ xt.tfld = ttp##_snan_to_qnan(xt.tfld); \ } \ @@ -2553,7 +2554,7 @@ void helper_##op(CPUPPCState *env, uint3 \ for (i = 0; i < nels; i++) { \ if (unlikely(stp##_is_any_nan(xb.sfld))) { \ - if (stp##_is_signaling_nan(xb.sfld)) { \ + if (stp##_is_signaling_nan(xb.sfld, &env->fp_status)) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ } \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \ @@ -2662,7 +2663,8 @@ void helper_##op(CPUPPCState *env, uint3 } \ \ for (i = 0; i < nels; i++) { \ - if (unlikely(tp##_is_signaling_nan(xb.fld))) { \ + if (unlikely(tp##_is_signaling_nan(xb.fld, \ + &env->fp_status))) { \ fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 0); \ xt.fld = tp##_snan_to_qnan(xb.fld); \ } else { \ Index: qemu-git-trunk/target-s390x/fpu_helper.c =================================================================== --- qemu-git-trunk.orig/target-s390x/fpu_helper.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-s390x/fpu_helper.c 2014-12-08 22:37:36.758946934 +0000 @@ -591,7 +591,7 @@ uint64_t HELPER(msdb)(CPUS390XState *env } /* test data class 32-bit */ -uint32_t HELPER(tceb)(uint64_t f1, uint64_t m2) +uint32_t HELPER(tceb)(CPUS390XState *env, uint64_t f1, uint64_t m2) { float32 v1 = f1; int neg = float32_is_neg(v1); @@ -600,7 +600,8 @@ uint32_t HELPER(tceb)(uint64_t f1, uint6 if ((float32_is_zero(v1) && (m2 & (1 << (11-neg)))) || (float32_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float32_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || - (float32_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { + (float32_is_signaling_nan(v1, &env->fpu_status) && + (m2 & (1 << (1-neg))))) { cc = 1; } else if (m2 & (1 << (9-neg))) { /* assume normalized number */ @@ -611,7 +612,7 @@ uint32_t HELPER(tceb)(uint64_t f1, uint6 } /* test data class 64-bit */ -uint32_t HELPER(tcdb)(uint64_t v1, uint64_t m2) +uint32_t HELPER(tcdb)(CPUS390XState *env, uint64_t v1, uint64_t m2) { int neg = float64_is_neg(v1); uint32_t cc = 0; @@ -619,7 +620,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint6 if ((float64_is_zero(v1) && (m2 & (1 << (11-neg)))) || (float64_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float64_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || - (float64_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { + (float64_is_signaling_nan(v1, &env->fpu_status) && + (m2 & (1 << (1-neg))))) { cc = 1; } else if (m2 & (1 << (9-neg))) { /* assume normalized number */ @@ -630,7 +632,8 @@ uint32_t HELPER(tcdb)(uint64_t v1, uint6 } /* test data class 128-bit */ -uint32_t HELPER(tcxb)(uint64_t ah, uint64_t al, uint64_t m2) +uint32_t HELPER(tcxb)(CPUS390XState *env, uint64_t ah, + uint64_t al, uint64_t m2) { float128 v1 = make_float128(ah, al); int neg = float128_is_neg(v1); @@ -639,7 +642,8 @@ uint32_t HELPER(tcxb)(uint64_t ah, uint6 if ((float128_is_zero(v1) && (m2 & (1 << (11-neg)))) || (float128_is_infinity(v1) && (m2 & (1 << (5-neg)))) || (float128_is_any_nan(v1) && (m2 & (1 << (3-neg)))) || - (float128_is_signaling_nan(v1) && (m2 & (1 << (1-neg))))) { + (float128_is_signaling_nan(v1, &env->fpu_status) && + (m2 & (1 << (1-neg))))) { cc = 1; } else if (m2 & (1 << (9-neg))) { /* assume normalized number */ Index: qemu-git-trunk/target-s390x/helper.h =================================================================== --- qemu-git-trunk.orig/target-s390x/helper.h 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-s390x/helper.h 2014-12-08 22:37:36.758946934 +0000 @@ -68,9 +68,9 @@ DEF_HELPER_FLAGS_4(maeb, TCG_CALL_NO_WG, DEF_HELPER_FLAGS_4(madb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(mseb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(msdb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) -DEF_HELPER_FLAGS_2(tceb, TCG_CALL_NO_RWG_SE, i32, i64, i64) -DEF_HELPER_FLAGS_2(tcdb, TCG_CALL_NO_RWG_SE, i32, i64, i64) -DEF_HELPER_FLAGS_3(tcxb, TCG_CALL_NO_RWG_SE, i32, i64, i64, i64) +DEF_HELPER_FLAGS_3(tceb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64) +DEF_HELPER_FLAGS_3(tcdb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64) +DEF_HELPER_FLAGS_4(tcxb, TCG_CALL_NO_RWG_SE, i32, env, i64, i64, i64) DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_2(sqeb, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_2(sqdb, TCG_CALL_NO_WG, i64, env, i64) Index: qemu-git-trunk/target-s390x/translate.c =================================================================== --- qemu-git-trunk.orig/target-s390x/translate.c 2014-12-08 22:36:20.000000000 +0000 +++ qemu-git-trunk/target-s390x/translate.c 2014-12-08 22:37:36.758946934 +0000 @@ -3513,21 +3513,21 @@ static ExitStatus op_svc(DisasContext *s static ExitStatus op_tceb(DisasContext *s, DisasOps *o) { - gen_helper_tceb(cc_op, o->in1, o->in2); + gen_helper_tceb(cc_op, cpu_env, o->in1, o->in2); set_cc_static(s); return NO_EXIT; } static ExitStatus op_tcdb(DisasContext *s, DisasOps *o) { - gen_helper_tcdb(cc_op, o->in1, o->in2); + gen_helper_tcdb(cc_op, cpu_env, o->in1, o->in2); set_cc_static(s); return NO_EXIT; } static ExitStatus op_tcxb(DisasContext *s, DisasOps *o) { - gen_helper_tcxb(cc_op, o->out, o->out2, o->in2); + gen_helper_tcxb(cc_op, cpu_env, o->out, o->out2, o->in2); set_cc_static(s); return NO_EXIT; }