From patchwork Tue Mar 15 11:26:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 86954 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2F42BB6F72 for ; Tue, 15 Mar 2011 22:38:16 +1100 (EST) Received: from localhost ([127.0.0.1]:50934 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PzSZe-0006a6-3x for incoming@patchwork.ozlabs.org; Tue, 15 Mar 2011 07:38:02 -0400 Received: from [140.186.70.92] (port=35105 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PzSOe-0000xE-Vu for qemu-devel@nongnu.org; Tue, 15 Mar 2011 07:26:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PzSOc-0004BD-96 for qemu-devel@nongnu.org; Tue, 15 Mar 2011 07:26:40 -0400 Received: from david.siemens.de ([192.35.17.14]:18194) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PzSOb-0004AP-V9 for qemu-devel@nongnu.org; Tue, 15 Mar 2011 07:26:38 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by david.siemens.de (8.13.6/8.13.6) with ESMTP id p2FBQbbd010904; Tue, 15 Mar 2011 12:26:37 +0100 Received: from mchn199C.mchp.siemens.de ([146.254.215.103]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p2FBQVg4000888; Tue, 15 Mar 2011 12:26:36 +0100 From: Jan Kiszka To: Avi Kivity , Marcelo Tosatti Date: Tue, 15 Mar 2011 12:26:21 +0100 Message-Id: X-Mailer: git-send-email 1.7.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.14 Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [Qemu-devel] [PATCH v2 10/20] x86: Properly reset PAT MSR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Conforming to the Intel spec, set the power-on value of PAT also on reset, but save it across INIT. Signed-off-by: Jan Kiszka --- target-i386/cpu.h | 4 ++-- target-i386/cpuid.c | 1 - target-i386/helper.c | 5 +++++ 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index d0eae75..c7047d5 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -685,8 +685,6 @@ typedef struct CPUX86State { uint64_t tsc; - uint64_t pat; - uint64_t mcg_status; /* exception/interrupt handling */ @@ -707,6 +705,8 @@ typedef struct CPUX86State { CPU_COMMON + uint64_t pat; + /* processor features (e.g. for CPUID insn) */ uint32_t cpuid_level; uint32_t cpuid_vendor1; diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c index 5382a28..814d13e 100644 --- a/target-i386/cpuid.c +++ b/target-i386/cpuid.c @@ -847,7 +847,6 @@ int cpu_x86_register (CPUX86State *env, const char *cpu_model) env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16); env->cpuid_version |= def->stepping; env->cpuid_features = def->features; - env->pat = 0x0007040600070406ULL; env->cpuid_ext_features = def->ext_features; env->cpuid_ext2_features = def->ext2_features; env->cpuid_ext3_features = def->ext3_features; diff --git a/target-i386/helper.c b/target-i386/helper.c index a08309f..d15fca5 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -99,6 +99,8 @@ void cpu_reset(CPUX86State *env) env->mxcsr = 0x1f80; + env->pat = 0x0007040600070406ULL; + memset(env->dr, 0, sizeof(env->dr)); env->dr[6] = DR6_FIXED_1; env->dr[7] = DR7_FIXED_1; @@ -1280,8 +1282,11 @@ CPUX86State *cpu_x86_init(const char *cpu_model) void do_cpu_init(CPUState *env) { int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI; + uint64_t pat = env->pat; + cpu_reset(env); env->interrupt_request = sipi; + env->pat = pat; apic_init_reset(env->apic_state); env->halted = !cpu_is_bsp(env); }