From patchwork Wed Apr 14 18:22:39 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 51199 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 089F9B7D48 for ; Thu, 29 Apr 2010 05:09:15 +1000 (EST) Received: from localhost ([127.0.0.1]:59880 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O7CdE-0001bp-0H for incoming@patchwork.ozlabs.org; Wed, 28 Apr 2010 15:09:12 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O7C1m-0000Nt-EN for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:30 -0400 Received: from [140.186.70.92] (port=46593 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O7C1c-0000FE-DW for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O7C1S-0004Sv-EC for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:19 -0400 Received: from are.twiddle.net ([75.149.56.221]:36490) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O7C1S-0004Rz-3s for qemu-devel@nongnu.org; Wed, 28 Apr 2010 14:30:10 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 6F6081075; Wed, 28 Apr 2010 11:30:06 -0700 (PDT) Message-Id: In-Reply-To: References: From: Richard Henderson Date: Wed, 14 Apr 2010 11:22:39 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 17/22] tcg-i386: Tidy unary arithmetic. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Define OPC_GRP3 and EXT3_FOO to match. Use them instead of bare constants. Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to make it clear which extension should be used with which opcode. Signed-off-by: Richard Henderson Acked-by: Aurelien Jarno --- tcg/i386/tcg-target.c | 38 +++++++++++++++++++++++++------------- 1 files changed, 25 insertions(+), 13 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 0c1a53a..c3f3e4d 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -195,7 +195,11 @@ static inline int tcg_target_const_match(tcg_target_long val, #define OPC_SHIFT_cl (0xd3) #define OPC_TESTL (0x85) -/* Group 1 opcode extensions for 0x80-0x83. */ +#define OPC_GRP3_Ev (0xf7) +#define OPC_GRP5 (0xff) + +/* Group 1 opcode extensions for 0x80-0x83. + These are also used as modifiers for OPC_ARITH. */ #define ARITH_ADD 0 #define ARITH_OR 1 #define ARITH_ADC 2 @@ -212,9 +216,17 @@ static inline int tcg_target_const_match(tcg_target_long val, #define SHIFT_SHR 5 #define SHIFT_SAR 7 -/* Group 5 opcode extensions for 0xff. */ -#define EXT_CALLN_Ev 2 -#define EXT_JMPN_Ev 4 +/* Group 3 opcode extensions for 0xf6, 0xf7. To be used with OPC_GRP3. */ +#define EXT3_NOT 2 +#define EXT3_NEG 3 +#define EXT3_MUL 4 +#define EXT3_IMUL 5 +#define EXT3_DIV 6 +#define EXT3_IDIV 7 + +/* Group 5 opcode extensions for 0xff. To be used with OPC_GRP5. */ +#define EXT5_CALLN_Ev 2 +#define EXT5_JMPN_Ev 4 /* Condition codes to be added to OPC_JCC_{long,short}. */ #define JCC_JMP (-1) @@ -1081,7 +1093,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out32(s, 0); } else { /* indirect jump method */ - tcg_out_modrm_offset(s, 0xff, EXT_JMPN_Ev, -1, + tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, -1, (tcg_target_long)(s->tb_next + args[0])); } s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf; @@ -1091,7 +1103,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_calli(s, args[0]); } else { /* call *reg */ - tcg_out_modrm(s, 0xff, EXT_CALLN_Ev, args[0]); + tcg_out_modrm(s, OPC_GRP5, EXT5_CALLN_Ev, args[0]); } break; case INDEX_op_jmp: @@ -1100,7 +1112,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4); } else { /* jmp *reg */ - tcg_out_modrm(s, 0xff, EXT_JMPN_Ev, args[0]); + tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, args[0]); } break; case INDEX_op_br: @@ -1177,13 +1189,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, } break; case INDEX_op_mulu2_i32: - tcg_out_modrm(s, 0xf7, 4, args[3]); + tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_MUL, args[3]); break; case INDEX_op_div2_i32: - tcg_out_modrm(s, 0xf7, 7, args[4]); + tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_IDIV, args[4]); break; case INDEX_op_divu2_i32: - tcg_out_modrm(s, 0xf7, 6, args[4]); + tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_DIV, args[4]); break; case INDEX_op_shl_i32: c = SHIFT_SHL; @@ -1247,11 +1259,11 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_neg_i32: - tcg_out_modrm(s, 0xf7, 3, args[0]); + tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_NEG, args[0]); break; case INDEX_op_not_i32: - tcg_out_modrm(s, 0xf7, 2, args[0]); + tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_NOT, args[0]); break; case INDEX_op_ext8s_i32: @@ -1419,7 +1431,7 @@ void tcg_target_qemu_prologue(TCGContext *s) stack_addend = frame_size - push_size; tcg_out_addi(s, TCG_REG_ESP, -stack_addend); - tcg_out_modrm(s, 0xff, EXT_JMPN_Ev, TCG_REG_EAX); /* jmp *%eax */ + tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_EAX); /* jmp *%eax */ /* TB epilogue */ tb_ret_addr = s->code_ptr;