From patchwork Mon Mar 25 22:08:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Helge Deller X-Patchwork-Id: 1915862 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=mqJo9bwb; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4V3Rt61Mq5z1yWr for ; Tue, 26 Mar 2024 09:09:17 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rosUR-0002cT-EK; Mon, 25 Mar 2024 18:08:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rosUO-0002bl-Le for qemu-devel@nongnu.org; Mon, 25 Mar 2024 18:08:20 -0400 Received: from dfw.source.kernel.org ([139.178.84.217]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rosUM-0002Yg-0j for qemu-devel@nongnu.org; Mon, 25 Mar 2024 18:08:20 -0400 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 6029A60F77; Mon, 25 Mar 2024 22:08:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E10BBC433F1; Mon, 25 Mar 2024 22:08:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711404487; bh=UNyvGaildRDOuM3J5SYmI6rAqLtDnDEhYHPHsjoXqaQ=; h=Date:From:To:Subject:From; b=mqJo9bwb4b5VC4MLKLWocAK4dutqF2R/rFTHFTqOlFBDwgugnzsP1tp00emokqxWz LkKCdfQu8/z8yTRm9yHXfiPxrpJk+dEm8agVgGFokd7iapLUKZQPfDuxD3GF1awPqk JgOsrk3gPittV+ahk56O6PbOxvrwZJYNGXB4MmxfEirzSTWzbL3yeF32FDnh+VuQI2 fOP2klfCq1vF4ekfk9rGP2wTf44yxThdIiYZBGCd5d2jchd6W2APlhLG7p+kf/+P2b ZcrA+YQ4DKu2LhRAhRbZni9Ge+NeCZgrmxCLYj+QSQru3omfYwrzcmcItDtcF4M2eL x//ymjPQsR7DQ== Date: Mon, 25 Mar 2024 23:08:03 +0100 From: Helge Deller To: Richard Henderson , qemu-devel@nongnu.org, Sven Schnelle Subject: [PATCH] target/hppa: Fix diag instructions to set/restore shadow registers Message-ID: MIME-Version: 1.0 Content-Disposition: inline Received-SPF: pass client-ip=139.178.84.217; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -71 X-Spam_score: -7.2 X-Spam_bar: ------- X-Spam_report: (-7.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.065, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different diag instructions to save or restore the CPU registers to/from the shadow registers. Implement those per-CPU architecture diag instructions to fix those parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test the shadow registers. Signed-off-by: Helge Deller diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 8fd7ba65d8..2c5d58bec9 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -86,6 +86,7 @@ DEF_HELPER_FLAGS_0(read_interval_timer, TCG_CALL_NO_RWG, tl) #ifndef CONFIG_USER_ONLY DEF_HELPER_1(halt, noreturn, env) DEF_HELPER_1(reset, noreturn, env) +DEF_HELPER_1(putshadowregs, void, env) DEF_HELPER_1(getshadowregs, void, env) DEF_HELPER_1(rfi, void, env) DEF_HELPER_1(rfi_r, void, env) diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 4a31748342..3727f4ce8b 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -95,6 +95,17 @@ void HELPER(rfi)(CPUHPPAState *env) cpu_hppa_put_psw(env, env->cr[CR_IPSW]); } +void HELPER(putshadowregs)(CPUHPPAState *env) +{ + env->shadow[0] = env->gr[1]; + env->shadow[1] = env->gr[8]; + env->shadow[2] = env->gr[9]; + env->shadow[3] = env->gr[16]; + env->shadow[4] = env->gr[17]; + env->shadow[5] = env->gr[24]; + env->shadow[6] = env->gr[25]; +} + void HELPER(getshadowregs)(CPUHPPAState *env) { env->gr[1] = env->shadow[0]; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 99c5c4cbca..40f1cbe7ed 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4533,6 +4533,18 @@ static bool trans_diag(DisasContext *ctx, arg_diag *a) gen_helper_diag_console_output(tcg_env); return nullify_end(ctx); } + if ((ctx->is_pa20 && a->i == 0x701840) || + (!ctx->is_pa20 && a->i == 0x1a40)) { + /* save shadow registers */ + nullify_over(ctx); + gen_helper_putshadowregs(tcg_env); + return nullify_end(ctx); + } + if ((ctx->is_pa20 && a->i == 0x781840) || + (!ctx->is_pa20 && a->i == 0x1a00)) { + /* restore shadow registers */ + return trans_getshadowregs(ctx, NULL); + } #endif qemu_log_mask(LOG_UNIMP, "DIAG opcode 0x%04x ignored\n", a->i); return true;