| Message ID | DM6PR11MB40909B4A33D66A3100F6D219870E9@DM6PR11MB4090.namprd11.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | target/i386/hax: Add XCR0 support | expand |
Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help to > merge this patch to add corresponding support into HAX user space of > QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 2001 > > From: Wenchao Wang <wenchao.wang@intel.com> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Hi, Philippe, Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. Best Regards, Wenchao -----Original Message----- From: Wang, Wenchao Sent: Monday, November 28, 2022 16:11 To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Hi Wenchao, On 5/12/22 09:35, Wang, Wenchao wrote: > Hi, Philippe, > > Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. I don't understand this part of HAXM enough, but per your explanation, your change looks correct. I'll let Paolo decide :) Regards, Phil. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, November 28, 2022 16:11 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Hi, Philippe, > > It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Friday, November 25, 2022 21:37 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi, > > On 25/11/22 13:18, Wang, Wenchao wrote: >> Hi, maintainers, >> >> As HAXM v7.8.0 is released and it added XCR0 support, could you help >> to merge this patch to add corresponding support into HAX user space >> of QEMU? The patch has been included in the attachment. Thanks. > > See > https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches > on how to send patches to a mailing list. > >> >> Best Regards, >> >> Wenchao >> >> From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 >> 2001 >> >> From: Wenchao Wang <wenchao.wang@intel.com> >> >> Date: Fri, 25 Nov 2022 18:37:34 +0800 >> >> Subject: [PATCH] target/i386/hax: Add XCR0 support >> >> Introduce extended control register XCR0 to support XSAVE feature set. >> >> Note: This change requires at least HAXM v7.8.0 to support. >> >> Reviewed-by: Hang Yuan <hang.yuan@intel.com> >> >> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> >> >> --- >> >> target/i386/hax/hax-interface.h | 2 ++ >> >> 1 file changed, 2 insertions(+) >> >> diff --git a/target/i386/hax/hax-interface.h >> b/target/i386/hax/hax-interface.h >> >> index 537ae084e9..1d13bb2380 100644 >> >> --- a/target/i386/hax/hax-interface.h >> >> +++ b/target/i386/hax/hax-interface.h >> >> @@ -201,6 +201,8 @@ struct vcpu_state_t { >> >> uint64_t _cr3; >> >> uint64_t _cr4; >> >> + uint64_t _xcr0; >> >> + >> >> uint64_t _dr0; >> >> uint64_t _dr1; >> >> uint64_t _dr2; >> >> -- >> >> 2.17.1 >> > > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... > > Regards, > > Phil.
Thanks for Phillippe's reply. Hi, Paolo, Could you help to review the patch of HAX? If there is any concern about it, feel free to discuss with me. Thanks a lot. Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Monday, December 5, 2022 17:05 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi Wenchao, On 5/12/22 09:35, Wang, Wenchao wrote: > Hi, Philippe, > > Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. I don't understand this part of HAXM enough, but per your explanation, your change looks correct. I'll let Paolo decide :) Regards, Phil. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, November 28, 2022 16:11 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Hi, Philippe, > > It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Friday, November 25, 2022 21:37 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi, > > On 25/11/22 13:18, Wang, Wenchao wrote: >> Hi, maintainers, >> >> As HAXM v7.8.0 is released and it added XCR0 support, could you help >> to merge this patch to add corresponding support into HAX user space >> of QEMU? The patch has been included in the attachment. Thanks. > > See > https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitt > ing-your-patches on how to send patches to a mailing list. > >> >> Best Regards, >> >> Wenchao >> >> From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 >> 2001 >> >> From: Wenchao Wang <wenchao.wang@intel.com> >> >> Date: Fri, 25 Nov 2022 18:37:34 +0800 >> >> Subject: [PATCH] target/i386/hax: Add XCR0 support >> >> Introduce extended control register XCR0 to support XSAVE feature set. >> >> Note: This change requires at least HAXM v7.8.0 to support. >> >> Reviewed-by: Hang Yuan <hang.yuan@intel.com> >> >> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> >> >> --- >> >> target/i386/hax/hax-interface.h | 2 ++ >> >> 1 file changed, 2 insertions(+) >> >> diff --git a/target/i386/hax/hax-interface.h >> b/target/i386/hax/hax-interface.h >> >> index 537ae084e9..1d13bb2380 100644 >> >> --- a/target/i386/hax/hax-interface.h >> >> +++ b/target/i386/hax/hax-interface.h >> >> @@ -201,6 +201,8 @@ struct vcpu_state_t { >> >> uint64_t _cr3; >> >> uint64_t _cr4; >> >> + uint64_t _xcr0; >> >> + >> >> uint64_t _dr0; >> >> uint64_t _dr1; >> >> uint64_t _dr2; >> >> -- >> >> 2.17.1 >> > > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... > > Regards, > > Phil.
Hi, Paolo, As HAXM v7.8.0 is released and it added XCR0 support, could you help to merge this patch to add corresponding support into HAX user space of QEMU? The patch has been attached below. Thanks. Best Regards, Wenchao --------------------------------- From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 2001 From: Wenchao Wang <wenchao.wang@intel.com> Date: Fri, 25 Nov 2022 18:37:34 +0800 Subject: [PATCH] target/i386/hax: Add XCR0 support Introduce extended control register XCR0 to support XSAVE feature set. Note: This change requires at least HAXM v7.8.0 to support. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> --- target/i386/hax/hax-interface.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interface.h index 537ae084e9..1d13bb2380 100644 --- a/target/i386/hax/hax-interface.h +++ b/target/i386/hax/hax-interface.h @@ -201,6 +201,8 @@ struct vcpu_state_t { uint64_t _cr3; uint64_t _cr4; + uint64_t _xcr0; + uint64_t _dr0; uint64_t _dr1; uint64_t _dr2;
Hi, Philippe, As Paolo did not comment with this patch, as you used to think it looks correct, could you help to merge this one-line patch as no one picked it up so far? Thanks a lot. Best Regards, Wenchao -----Original Message----- From: Wang, Wenchao Sent: Monday, December 5, 2022 17:10 To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support Thanks for Phillippe's reply. Hi, Paolo, Could you help to review the patch of HAX? If there is any concern about it, feel free to discuss with me. Thanks a lot. Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Monday, December 5, 2022 17:05 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi Wenchao, On 5/12/22 09:35, Wang, Wenchao wrote: > Hi, Philippe, > > Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. I don't understand this part of HAXM enough, but per your explanation, your change looks correct. I'll let Paolo decide :) Regards, Phil. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, November 28, 2022 16:11 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Hi, Philippe, > > It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Friday, November 25, 2022 21:37 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi, > > On 25/11/22 13:18, Wang, Wenchao wrote: >> Hi, maintainers, >> >> As HAXM v7.8.0 is released and it added XCR0 support, could you help >> to merge this patch to add corresponding support into HAX user space >> of QEMU? The patch has been included in the attachment. Thanks. > > See > https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitt > ing-your-patches on how to send patches to a mailing list. > >> >> Best Regards, >> >> Wenchao >> >> From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 >> 2001 >> >> From: Wenchao Wang <wenchao.wang@intel.com> >> >> Date: Fri, 25 Nov 2022 18:37:34 +0800 >> >> Subject: [PATCH] target/i386/hax: Add XCR0 support >> >> Introduce extended control register XCR0 to support XSAVE feature set. >> >> Note: This change requires at least HAXM v7.8.0 to support. >> >> Reviewed-by: Hang Yuan <hang.yuan@intel.com> >> >> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> >> >> --- >> >> target/i386/hax/hax-interface.h | 2 ++ >> >> 1 file changed, 2 insertions(+) >> >> diff --git a/target/i386/hax/hax-interface.h >> b/target/i386/hax/hax-interface.h >> >> index 537ae084e9..1d13bb2380 100644 >> >> --- a/target/i386/hax/hax-interface.h >> >> +++ b/target/i386/hax/hax-interface.h >> >> @@ -201,6 +201,8 @@ struct vcpu_state_t { >> >> uint64_t _cr3; >> >> uint64_t _cr4; >> >> + uint64_t _xcr0; >> >> + >> >> uint64_t _dr0; >> >> uint64_t _dr1; >> >> uint64_t _dr2; >> >> -- >> >> 2.17.1 >> > > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... > > Regards, > > Phil.
Hi Wenchao, On 19/12/22 10:01, Wang, Wenchao wrote: > Hi, Philippe, > > As Paolo did not comment with this patch, as you used to think it looks correct, could you help to merge this one-line patch as no one picked it up so far? Thanks a lot. I'm pretty sure Paolo is busy with KVM stuff and will take this patch when he switch to QEMU (it really is within his area). If he doesn't comment I'll take it with a generic target/ cleanup series next week. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, December 5, 2022 17:10 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Thanks for Phillippe's reply. > > Hi, Paolo, > > Could you help to review the patch of HAX? If there is any concern about it, feel free to discuss with me. Thanks a lot. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Monday, December 5, 2022 17:05 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi Wenchao, > > On 5/12/22 09:35, Wang, Wenchao wrote: >> Hi, Philippe, >> >> Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. > > I don't understand this part of HAXM enough, but per your explanation, your change looks correct. I'll let Paolo decide :) > > Regards, > > Phil. > >> Best Regards, >> Wenchao >> >> -----Original Message----- >> From: Wang, Wenchao >> Sent: Monday, November 28, 2022 16:11 >> To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org >> Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini >> <pbonzini@redhat.com> >> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support >> >> Hi, Philippe, >> >> It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. >> >> >> Best Regards, >> Wenchao
Thanks for Philippe's reply and help. Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Monday, December 19, 2022 17:10 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi Wenchao, On 19/12/22 10:01, Wang, Wenchao wrote: > Hi, Philippe, > > As Paolo did not comment with this patch, as you used to think it looks correct, could you help to merge this one-line patch as no one picked it up so far? Thanks a lot. I'm pretty sure Paolo is busy with KVM stuff and will take this patch when he switch to QEMU (it really is within his area). If he doesn't comment I'll take it with a generic target/ cleanup series next week. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, December 5, 2022 17:10 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Thanks for Phillippe's reply. > > Hi, Paolo, > > Could you help to review the patch of HAX? If there is any concern about it, feel free to discuss with me. Thanks a lot. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Monday, December 5, 2022 17:05 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi Wenchao, > > On 5/12/22 09:35, Wang, Wenchao wrote: >> Hi, Philippe, >> >> Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. > > I don't understand this part of HAXM enough, but per your explanation, > your change looks correct. I'll let Paolo decide :) > > Regards, > > Phil. > >> Best Regards, >> Wenchao >> >> -----Original Message----- >> From: Wang, Wenchao >> Sent: Monday, November 28, 2022 16:11 >> To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org >> Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini >> <pbonzini@redhat.com> >> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support >> >> Hi, Philippe, >> >> It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. >> >> >> Best Regards, >> Wenchao
Hi, Philippe, As nobody made any comment on this change, could you help to merge the patch with a generic target cleanup series? The patch has been attached below. Thanks in advance. Best Regards, Wenchao --------------------------------- From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 2001 From: Wenchao Wang <wenchao.wang@intel.com> Date: Fri, 25 Nov 2022 18:37:34 +0800 Subject: [PATCH] target/i386/hax: Add XCR0 support Introduce extended control register XCR0 to support XSAVE feature set. Note: This change requires at least HAXM v7.8.0 to support. Reviewed-by: Hang Yuan <hang.yuan@intel.com> Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> --- target/i386/hax/hax-interface.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interface.h index 537ae084e9..1d13bb2380 100644 --- a/target/i386/hax/hax-interface.h +++ b/target/i386/hax/hax-interface.h @@ -201,6 +201,8 @@ struct vcpu_state_t { uint64_t _cr3; uint64_t _cr4; + uint64_t _xcr0; + uint64_t _dr0; uint64_t _dr1; uint64_t _dr2; -- 2.17.1 -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org> Sent: Monday, December 19, 2022 17:10 To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org Cc: Paolo Bonzini <pbonzini@redhat.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi Wenchao, On 19/12/22 10:01, Wang, Wenchao wrote: > Hi, Philippe, > > As Paolo did not comment with this patch, as you used to think it looks correct, could you help to merge this one-line patch as no one picked it up so far? Thanks a lot. I'm pretty sure Paolo is busy with KVM stuff and will take this patch when he switch to QEMU (it really is within his area). If he doesn't comment I'll take it with a generic target/ cleanup series next week. > Best Regards, > Wenchao > > -----Original Message----- > From: Wang, Wenchao > Sent: Monday, December 5, 2022 17:10 > To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: RE: [PATCH] target/i386/hax: Add XCR0 support > > Thanks for Phillippe's reply. > > Hi, Paolo, > > Could you help to review the patch of HAX? If there is any concern about it, feel free to discuss with me. Thanks a lot. > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Monday, December 5, 2022 17:05 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini > <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi Wenchao, > > On 5/12/22 09:35, Wang, Wenchao wrote: >> Hi, Philippe, >> >> Do you agree with my opinion and is there any further process that I need to follow to get this patch merged? Thanks a lot. > > I don't understand this part of HAXM enough, but per your explanation, > your change looks correct. I'll let Paolo decide :) > > Regards, > > Phil. > >> Best Regards, >> Wenchao >> >> -----Original Message----- >> From: Wang, Wenchao >> Sent: Monday, November 28, 2022 16:11 >> To: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel@nongnu.org >> Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini >> <pbonzini@redhat.com> >> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support >> >> Hi, Philippe, >> >> It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. >> >> >> Best Regards, >> Wenchao
Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com> ha scritto: > Hi, Philippe, > > It is just the full patch. Currently, the implementation of HAXM is > simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM > will handle the xcr0 state within the kernel space, including > initialization, update, etc. This patch adds the xcr0 variable for > allocating extra 8-byte buffer occupation, which will be passed between > QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the > patched QEMU and it can launch all guest OSes. Thanks for your comments. > I don't understand the patch very well, and I am on the phone so it's hard to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break support for QEMU without this patch, and likewise will QEMU with this patch will HAXM versions older than 7.8.0? Or does this work on any version because QEMU treats the struct as a black box? Paolo > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Friday, November 25, 2022 21:37 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi, > > On 25/11/22 13:18, Wang, Wenchao wrote: > > Hi, maintainers, > > > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > > to merge this patch to add corresponding support into HAX user space > > of QEMU? The patch has been included in the attachment. Thanks. > > See > > https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches > on how to send patches to a mailing list. > > > > > Best Regards, > > > > Wenchao > > > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > > 2001 > > > > From: Wenchao Wang <wenchao.wang@intel.com> > > > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > > > Introduce extended control register XCR0 to support XSAVE feature set. > > > > Note: This change requires at least HAXM v7.8.0 to support. > > > > Reviewed-by: Hang Yuan <hang.yuan@intel.com> > > > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> > > > > --- > > > > target/i386/hax/hax-interface.h | 2 ++ > > > > 1 file changed, 2 insertions(+) > > > > diff --git a/target/i386/hax/hax-interface.h > > b/target/i386/hax/hax-interface.h > > > > index 537ae084e9..1d13bb2380 100644 > > > > --- a/target/i386/hax/hax-interface.h > > > > +++ b/target/i386/hax/hax-interface.h > > > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > > > uint64_t _cr3; > > > > uint64_t _cr4; > > > > + uint64_t _xcr0; > > > > + > > > > uint64_t _dr0; > > > > uint64_t _dr1; > > > > uint64_t _dr2; > > > > -- > > > > 2.17.1 > > > > Is that the full patch? It is missing the register use in > hax_sync_vcpu_register()... > > Regards, > > Phil. >
Hi, Paolo, Thanks for your reply. The reason why the variable xcr0 must be added to the header file of QEMU is because HAXM needs QEMU to allocate memory from user space and pass it to the kernel. This patch is only used to expand the buffer size of the structure, and HAXM will use and maintain this variable. Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM versions older than 7.8.0 cannot support QEMU with this patch, either. It will work on any version since HAXM v7.8.0. I know QEMU treats the structure as a black box, but HAXM never supported xcr0 before and the structure size is not enough if it has been supported. We have verified the patched QEMU and it can launch all guest OSes. Thanks. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com> Sent: Tuesday, December 27, 2022 23:13 To: Wang, Wenchao <wenchao.wang@intel.com> Cc: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel <qemu-devel@nongnu.org>; haxm-team <haxm-team@intel.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. I don't understand the patch very well, and I am on the phone so it's hard to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break support for QEMU without this patch, and likewise will QEMU with this patch will HAXM versions older than 7.8.0? Or does this work on any version because QEMU treats the struct as a black box? Paolo Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>>; qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org> Cc: haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>>; Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com<mailto:hang.yuan@intel.com>> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Hi, Paolo, Sorry for mistaken expression. Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM versions older than 7.8.0 still can support QEMU with this patch. It will work on any version besides HAXM v7.8.0. Best Regards, Wenchao From: Wang, Wenchao Sent: Wednesday, December 28, 2022 10:55 To: Paolo Bonzini <pbonzini@redhat.com> Cc: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel <qemu-devel@nongnu.org>; haxm-team <haxm-team@intel.com> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support Hi, Paolo, Thanks for your reply. The reason why the variable xcr0 must be added to the header file of QEMU is because HAXM needs QEMU to allocate memory from user space and pass it to the kernel. This patch is only used to expand the buffer size of the structure, and HAXM will use and maintain this variable. Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM versions older than 7.8.0 cannot support QEMU with this patch, either. It will work on any version since HAXM v7.8.0. I know QEMU treats the structure as a black box, but HAXM never supported xcr0 before and the structure size is not enough if it has been supported. We have verified the patched QEMU and it can launch all guest OSes. Thanks. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Sent: Tuesday, December 27, 2022 23:13 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> Cc: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>>; qemu-devel <qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org>>; haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. I don't understand the patch very well, and I am on the phone so it's hard to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break support for QEMU without this patch, and likewise will QEMU with this patch will HAXM versions older than 7.8.0? Or does this work on any version because QEMU treats the struct as a black box? Paolo Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>>; qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org> Cc: haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>>; Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com<mailto:hang.yuan@intel.com>> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Does it make sense to just allocate 4k of memory or so? Paolo Il mer 28 dic 2022, 03:55 Wang, Wenchao <wenchao.wang@intel.com> ha scritto: > Hi, Paolo, > > > > Thanks for your reply. > > > > The reason why the variable xcr0 must be added to the header file of QEMU > is because HAXM needs QEMU to allocate memory from user space and pass it > to the kernel. This patch is only used to expand the buffer size of the > structure, and HAXM will use and maintain this variable. > > Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM > versions older than 7.8.0 cannot support QEMU with this patch, either. It > will work on any version since HAXM v7.8.0. I know QEMU treats the > structure as a black box, but HAXM never supported xcr0 before and the > structure size is not enough if it has been supported. We have verified the > patched QEMU and it can launch all guest OSes. Thanks. > > > > > > Best Regards, > > Wenchao > > > > *From:* Paolo Bonzini <pbonzini@redhat.com> > *Sent:* Tuesday, December 27, 2022 23:13 > *To:* Wang, Wenchao <wenchao.wang@intel.com> > *Cc:* Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel < > qemu-devel@nongnu.org>; haxm-team <haxm-team@intel.com> > *Subject:* Re: [PATCH] target/i386/hax: Add XCR0 support > > > > > > Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com> ha > scritto: > > Hi, Philippe, > > It is just the full patch. Currently, the implementation of HAXM is > simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM > will handle the xcr0 state within the kernel space, including > initialization, update, etc. This patch adds the xcr0 variable for > allocating extra 8-byte buffer occupation, which will be passed between > QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the > patched QEMU and it can launch all guest OSes. Thanks for your comments. > > > > I don't understand the patch very well, and I am on the phone so it's hard > to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break > support for QEMU without this patch, and likewise will QEMU with this patch > will HAXM versions older than 7.8.0? > > > > Or does this work on any version because QEMU treats the struct as a black > box? > > > > Paolo > > > > > > > > Best Regards, > Wenchao > > -----Original Message----- > From: Philippe Mathieu-Daudé <philmd@linaro.org> > Sent: Friday, November 25, 2022 21:37 > To: Wang, Wenchao <wenchao.wang@intel.com>; qemu-devel@nongnu.org > Cc: haxm-team <haxm-team@intel.com>; Paolo Bonzini <pbonzini@redhat.com> > Subject: Re: [PATCH] target/i386/hax: Add XCR0 support > > Hi, > > On 25/11/22 13:18, Wang, Wenchao wrote: > > Hi, maintainers, > > > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > > to merge this patch to add corresponding support into HAX user space > > of QEMU? The patch has been included in the attachment. Thanks. > > See > > https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches > on how to send patches to a mailing list. > > > > > Best Regards, > > > > Wenchao > > > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > > 2001 > > > > From: Wenchao Wang <wenchao.wang@intel.com> > > > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > > > Introduce extended control register XCR0 to support XSAVE feature set. > > > > Note: This change requires at least HAXM v7.8.0 to support. > > > > Reviewed-by: Hang Yuan <hang.yuan@intel.com> > > > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com> > > > > --- > > > > target/i386/hax/hax-interface.h | 2 ++ > > > > 1 file changed, 2 insertions(+) > > > > diff --git a/target/i386/hax/hax-interface.h > > b/target/i386/hax/hax-interface.h > > > > index 537ae084e9..1d13bb2380 100644 > > > > --- a/target/i386/hax/hax-interface.h > > > > +++ b/target/i386/hax/hax-interface.h > > > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > > > uint64_t _cr3; > > > > uint64_t _cr4; > > > > + uint64_t _xcr0; > > > > + > > > > uint64_t _dr0; > > > > uint64_t _dr1; > > > > uint64_t _dr2; > > > > -- > > > > 2.17.1 > > > > Is that the full patch? It is missing the register use in > hax_sync_vcpu_register()... > > Regards, > > Phil. > >
Hi, Paolo, Thanks for your question. This buffer is only used by the interfaces of ioctl(HAX_VCPU_SET_REGS) or ioctl(HAX_VCPU_GET_REGS). It is currently sizeof(struct vcpu_state_t), which is changed by the patch. Currently, the parameters passed by different ioctl() are not same, so it may not be possible to allocate only a 4KB size of memory for shared use. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com> Sent: Wednesday, December 28, 2022 16:24 To: Wang, Wenchao <wenchao.wang@intel.com> Cc: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel <qemu-devel@nongnu.org>; haxm-team <haxm-team@intel.com> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Does it make sense to just allocate 4k of memory or so? Paolo Il mer 28 dic 2022, 03:55 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Paolo, Thanks for your reply. The reason why the variable xcr0 must be added to the header file of QEMU is because HAXM needs QEMU to allocate memory from user space and pass it to the kernel. This patch is only used to expand the buffer size of the structure, and HAXM will use and maintain this variable. Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM versions older than 7.8.0 cannot support QEMU with this patch, either. It will work on any version since HAXM v7.8.0. I know QEMU treats the structure as a black box, but HAXM never supported xcr0 before and the structure size is not enough if it has been supported. We have verified the patched QEMU and it can launch all guest OSes. Thanks. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Sent: Tuesday, December 27, 2022 23:13 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> Cc: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>>; qemu-devel <qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org>>; haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. I don't understand the patch very well, and I am on the phone so it's hard to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break support for QEMU without this patch, and likewise will QEMU with this patch will HAXM versions older than 7.8.0? Or does this work on any version because QEMU treats the struct as a black box? Paolo Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>>; qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org> Cc: haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>>; Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com<mailto:hang.yuan@intel.com>> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
Hi, Paolo, Sorry for bothering you. Do you think my answer is reasonable? Or do you have any other questions on that? If you agree, could you help to merge this patch in your coming pull request? Thanks a lot. Best Regards, Wenchao From: Wang, Wenchao Sent: Wednesday, December 28, 2022 16:55 To: Paolo Bonzini <pbonzini@redhat.com> Cc: Philippe Mathieu-Daudé <philmd@linaro.org>; qemu-devel <qemu-devel@nongnu.org>; haxm-team <haxm-team@intel.com> Subject: RE: [PATCH] target/i386/hax: Add XCR0 support Hi, Paolo, Thanks for your question. This buffer is only used by the interfaces of ioctl(HAX_VCPU_SET_REGS) or ioctl(HAX_VCPU_GET_REGS). It is currently sizeof(struct vcpu_state_t), which is changed by the patch. Currently, the parameters passed by different ioctl() are not same, so it may not be possible to allocate only a 4KB size of memory for shared use. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Sent: Wednesday, December 28, 2022 16:24 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> Cc: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>>; qemu-devel <qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org>>; haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Does it make sense to just allocate 4k of memory or so? Paolo Il mer 28 dic 2022, 03:55 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Paolo, Thanks for your reply. The reason why the variable xcr0 must be added to the header file of QEMU is because HAXM needs QEMU to allocate memory from user space and pass it to the kernel. This patch is only used to expand the buffer size of the structure, and HAXM will use and maintain this variable. Without this patch, HAXM v7.8.0 will break support for QEMU and the HAXM versions older than 7.8.0 cannot support QEMU with this patch, either. It will work on any version since HAXM v7.8.0. I know QEMU treats the structure as a black box, but HAXM never supported xcr0 before and the structure size is not enough if it has been supported. We have verified the patched QEMU and it can launch all guest OSes. Thanks. Best Regards, Wenchao From: Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Sent: Tuesday, December 27, 2022 23:13 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> Cc: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>>; qemu-devel <qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org>>; haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Il lun 28 nov 2022, 09:12 Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> ha scritto: Hi, Philippe, It is just the full patch. Currently, the implementation of HAXM is simple, we did not synchronize the vCPU register for xcr0 from QEMU. HAXM will handle the xcr0 state within the kernel space, including initialization, update, etc. This patch adds the xcr0 variable for allocating extra 8-byte buffer occupation, which will be passed between QEMU and HAXM when hax_sync_vcpu_state() is invoked. We have verified the patched QEMU and it can launch all guest OSes. Thanks for your comments. I don't understand the patch very well, and I am on the phone so it's hard to check QEMU's HAXM support sources right now. Did HAXM 7.8.0 break support for QEMU without this patch, and likewise will QEMU with this patch will HAXM versions older than 7.8.0? Or does this work on any version because QEMU treats the struct as a black box? Paolo Best Regards, Wenchao -----Original Message----- From: Philippe Mathieu-Daudé <philmd@linaro.org<mailto:philmd@linaro.org>> Sent: Friday, November 25, 2022 21:37 To: Wang, Wenchao <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>>; qemu-devel@nongnu.org<mailto:qemu-devel@nongnu.org> Cc: haxm-team <haxm-team@intel.com<mailto:haxm-team@intel.com>>; Paolo Bonzini <pbonzini@redhat.com<mailto:pbonzini@redhat.com>> Subject: Re: [PATCH] target/i386/hax: Add XCR0 support Hi, On 25/11/22 13:18, Wang, Wenchao wrote: > Hi, maintainers, > > As HAXM v7.8.0 is released and it added XCR0 support, could you help > to merge this patch to add corresponding support into HAX user space > of QEMU? The patch has been included in the attachment. Thanks. See https://www.qemu.org/docs/master/devel/submitting-a-patch.html#submitting-your-patches on how to send patches to a mailing list. > > Best Regards, > > Wenchao > > From b1789f2523d06798b8883664bfa9a9df797bfccf Mon Sep 17 00:00:00 > 2001 > > From: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > Date: Fri, 25 Nov 2022 18:37:34 +0800 > > Subject: [PATCH] target/i386/hax: Add XCR0 support > > Introduce extended control register XCR0 to support XSAVE feature set. > > Note: This change requires at least HAXM v7.8.0 to support. > > Reviewed-by: Hang Yuan <hang.yuan@intel.com<mailto:hang.yuan@intel.com>> > > Signed-off-by: Wenchao Wang <wenchao.wang@intel.com<mailto:wenchao.wang@intel.com>> > > --- > > target/i386/hax/hax-interface.h | 2 ++ > > 1 file changed, 2 insertions(+) > > diff --git a/target/i386/hax/hax-interface.h > b/target/i386/hax/hax-interface.h > > index 537ae084e9..1d13bb2380 100644 > > --- a/target/i386/hax/hax-interface.h > > +++ b/target/i386/hax/hax-interface.h > > @@ -201,6 +201,8 @@ struct vcpu_state_t { > > uint64_t _cr3; > > uint64_t _cr4; > > + uint64_t _xcr0; > > + > > uint64_t _dr0; > > uint64_t _dr1; > > uint64_t _dr2; > > -- > > 2.17.1 > Is that the full patch? It is missing the register use in hax_sync_vcpu_register()... Regards, Phil.
diff --git a/target/i386/hax/hax-interface.h b/target/i386/hax/hax-interface.h index 537ae084e9..1d13bb2380 100644 --- a/target/i386/hax/hax-interface.h +++ b/target/i386/hax/hax-interface.h @@ -201,6 +201,8 @@ struct vcpu_state_t { uint64_t _cr3; uint64_t _cr4; + uint64_t _xcr0; + uint64_t _dr0; uint64_t _dr1; uint64_t _dr2; -- 2.17.1