From patchwork Fri Dec 6 14:20:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Jinsong" X-Patchwork-Id: 298023 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 06C502C009D for ; Sat, 7 Dec 2013 01:20:55 +1100 (EST) Received: from localhost ([::1]:59247 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VowGx-00018s-T6 for incoming@patchwork.ozlabs.org; Fri, 06 Dec 2013 09:20:51 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56775) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VowGL-00014k-P8 for qemu-devel@nongnu.org; Fri, 06 Dec 2013 09:20:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VowGG-0004RG-Do for qemu-devel@nongnu.org; Fri, 06 Dec 2013 09:20:13 -0500 Received: from mga09.intel.com ([134.134.136.24]:10130) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VowGG-0004PR-1F for qemu-devel@nongnu.org; Fri, 06 Dec 2013 09:20:08 -0500 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 06 Dec 2013 06:16:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,841,1378882800"; d="scan'208,223";a="439737816" Received: from fmsmsx107.amr.corp.intel.com ([10.19.9.54]) by fmsmga001.fm.intel.com with ESMTP; 06 Dec 2013 06:20:06 -0800 Received: from fmsmsx151.amr.corp.intel.com (10.19.17.220) by FMSMSX107.amr.corp.intel.com (10.19.9.54) with Microsoft SMTP Server (TLS) id 14.3.123.3; Fri, 6 Dec 2013 06:20:05 -0800 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX151.amr.corp.intel.com (10.19.17.220) with Microsoft SMTP Server (TLS) id 14.3.123.3; Fri, 6 Dec 2013 06:20:05 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.57]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.186]) with mapi id 14.03.0123.003; Fri, 6 Dec 2013 22:20:04 +0800 From: "Liu, Jinsong" To: Paolo Bonzini , Gleb Natapov , "H. Peter Anvin" , "qemu-devel@nongnu.org" , kvm Thread-Topic: [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle Thread-Index: Ac7yjkEQtwwtump9SISrZ1ZBSwWt5A== Date: Fri, 6 Dec 2013 14:20:03 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.24 Subject: [Qemu-devel] [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From 12fa3564b7342c4e034b13671dc922ff23ac4b1e Mon Sep 17 00:00:00 2001 From: Liu Jinsong Date: Sat, 7 Dec 2013 05:18:35 +0800 Subject: [PATCH v3 2/2] target-i386: MSR_IA32_BNDCFGS handle Signed-off-by: Liu Jinsong --- target-i386/cpu.h | 3 +++ target-i386/kvm.c | 14 ++++++++++++++ target-i386/machine.c | 7 ++++++- 3 files changed, 23 insertions(+), 1 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index c28b901..bbec228 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -380,6 +380,8 @@ #define MSR_VM_HSAVE_PA 0xc0010117 +#define MSR_IA32_BNDCFGS 0x00000d90 + #define XSTATE_FP (1ULL << 0) #define XSTATE_SSE (1ULL << 1) #define XSTATE_YMM (1ULL << 2) @@ -928,6 +930,7 @@ typedef struct CPUX86State { XMMReg ymmh_regs[CPU_NB_REGS]; BNDReg bnd_regs[4]; BNDCSReg bndcs_regs; + uint64_t msr_bndcfgs; uint64_t xcr0; diff --git a/target-i386/kvm.c b/target-i386/kvm.c index ff913ff..01ebca2 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -69,6 +69,7 @@ static bool has_msr_feature_control; static bool has_msr_async_pf_en; static bool has_msr_pv_eoi_en; static bool has_msr_misc_enable; +static bool has_msr_bndcfgs; static bool has_msr_kvm_steal_time; static int lm_capable_kernel; @@ -772,6 +773,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_misc_enable = true; continue; } + if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) { + has_msr_bndcfgs = true; + continue; + } } } @@ -1214,6 +1219,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_set(&msrs[n++], MSR_IA32_FEATURE_CONTROL, env->msr_ia32_feature_control); } + if (has_msr_bndcfgs) { + kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs); + } } if (env->mcg_cap) { int i; @@ -1445,6 +1453,9 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_feature_control) { msrs[n++].index = MSR_IA32_FEATURE_CONTROL; } + if (has_msr_bndcfgs) { + msrs[n++].index = MSR_IA32_BNDCFGS; + } if (!env->tsc_valid) { msrs[n++].index = MSR_IA32_TSC; @@ -1560,6 +1571,9 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_IA32_FEATURE_CONTROL: env->msr_ia32_feature_control = msrs[i].data; break; + case MSR_IA32_BNDCFGS: + env->msr_bndcfgs = msrs[i].data; + break; default: if (msrs[i].index >= MSR_MC0_CTL && msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) { diff --git a/target-i386/machine.c b/target-i386/machine.c index ceab51b..2de1964 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -533,7 +533,11 @@ static bool mpx_needed(void *opaque) } } - return env->bndcs_regs.cfgu || env->bndcs_regs.sts; + if (env->bndcs_regs.cfgu || env->bndcs_regs.sts) { + return true; + } + + return !!env->msr_bndcfgs; } static const VMStateDescription vmstate_mpx = { @@ -545,6 +549,7 @@ static const VMStateDescription vmstate_mpx = { VMSTATE_BND_REGS(env.bnd_regs, X86CPU, 4), VMSTATE_UINT64(env.bndcs_regs.cfgu, X86CPU), VMSTATE_UINT64(env.bndcs_regs.sts, X86CPU), + VMSTATE_UINT64(env.msr_bndcfgs, X86CPU), VMSTATE_END_OF_LIST() } };