diff mbox

[v2,2/2] target-i386: Intel MPX

Message ID DE8DF0795D48FD4CA783C40EC829233501401CEB@SHSMSX101.ccr.corp.intel.com
State New
Headers show

Commit Message

Liu, Jinsong Dec. 4, 2013, 11:30 a.m. UTC 
> 
> Almost there.  Migration (vmstate) is still missing.
> 

Like this:

Comments

Paolo Bonzini Dec. 4, 2013, 5:23 p.m. UTC | #1 
Il 04/12/2013 12:30, Liu, Jinsong ha scritto:
>> > 
>> > Almost there.  Migration (vmstate) is still missing.
>> > 
> Like this:
> 
> ==================
> From faead85c0dbe62da896e0ed9e165d98e10216968 Mon Sep 17 00:00:00 2001
> From: Liu Jinsong <jinsong.liu@intel.com>
> Date: Wed, 4 Dec 2013 16:56:49 +0800
> Subject: [PATCH 2/2] target-i386: Intel MPX
> 
> Add some MPX related definiation, and hardcode sizes and offsets
> of xsave features 3 and 4. It also add corresponding part to
> kvm_get/put_xsave, and vmstate.
> 
> Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
> ---
>  target-i386/cpu.c     |    4 ++++
>  target-i386/cpu.h     |   22 +++++++++++++++++++---
>  target-i386/kvm.c     |   10 ++++++++++
>  target-i386/machine.c |   32 ++++++++++++++++++++++++++++++++
>  4 files changed, 65 insertions(+), 3 deletions(-)
> 
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 544b57f..52ca029 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -336,6 +336,10 @@ typedef struct ExtSaveArea {
>  static const ExtSaveArea ext_save_areas[] = {
>      [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
>              .offset = 0x240, .size = 0x100 },
> +    [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> +            .offset = 0x3c0, .size = 0x40  },
> +    [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> +            .offset = 0x400, .size = 0x10  },
>  };
>  
>  const char *get_register_name_32(unsigned int reg)
> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> index ea373e8..5c1dd17 100644
> --- a/target-i386/cpu.h
> +++ b/target-i386/cpu.h
> @@ -380,9 +380,12 @@
>  
>  #define MSR_VM_HSAVE_PA                 0xc0010117
>  
> -#define XSTATE_FP                       1
> -#define XSTATE_SSE                      2
> -#define XSTATE_YMM                      4
> +#define XSTATE_FP                       (1ULL << 0)
> +#define XSTATE_SSE                      (1ULL << 1)
> +#define XSTATE_YMM                      (1ULL << 2)
> +#define XSTATE_BNDREGS                  (1ULL << 3)
> +#define XSTATE_BNDCSR                   (1ULL << 4)
> +
>  
>  /* CPUID feature words */
>  typedef enum FeatureWord {
> @@ -545,6 +548,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
>  #define CPUID_7_0_EBX_ERMS     (1 << 9)
>  #define CPUID_7_0_EBX_INVPCID  (1 << 10)
>  #define CPUID_7_0_EBX_RTM      (1 << 11)
> +#define CPUID_7_0_EBX_MPX      (1 << 14)
>  #define CPUID_7_0_EBX_RDSEED   (1 << 18)
>  #define CPUID_7_0_EBX_ADX      (1 << 19)
>  #define CPUID_7_0_EBX_SMAP     (1 << 20)
> @@ -695,6 +699,16 @@ typedef union {
>      uint64_t q;
>  } MMXReg;
>  
> +typedef struct BNDReg {
> +    uint64_t lb;
> +    uint64_t ub;
> +} BNDReg;
> +
> +typedef struct BNDCSReg {
> +    uint64_t cfg;
> +    uint64_t sts;
> +} BNDCSReg;
> +
>  #ifdef HOST_WORDS_BIGENDIAN
>  #define XMM_B(n) _b[15 - (n)]
>  #define XMM_W(n) _w[7 - (n)]
> @@ -912,6 +926,8 @@ typedef struct CPUX86State {
>  
>      uint64_t xstate_bv;
>      XMMReg ymmh_regs[CPU_NB_REGS];
> +    BNDReg bnd_regs[4];
> +    BNDCSReg bndcs_regs;
>  
>      uint64_t xcr0;
>  
> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
> index 749aa09..347d3d3 100644
> --- a/target-i386/kvm.c
> +++ b/target-i386/kvm.c
> @@ -980,6 +980,8 @@ static int kvm_put_fpu(X86CPU *cpu)
>  #define XSAVE_XMM_SPACE   40
>  #define XSAVE_XSTATE_BV   128
>  #define XSAVE_YMMH_SPACE  144
> +#define XSAVE_BNDREGS     240
> +#define XSAVE_BNDCSR      256
>  
>  static int kvm_put_xsave(X86CPU *cpu)
>  {
> @@ -1012,6 +1014,10 @@ static int kvm_put_xsave(X86CPU *cpu)
>      *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
>      memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
>              sizeof env->ymmh_regs);
> +    memcpy(&xsave->region[XSAVE_BNDREGS], env->bnd_regs,
> +            sizeof env->bnd_regs);
> +    memcpy(&xsave->region[XSAVE_BNDCSR], &env->bndcs_regs,
> +            sizeof(env->bndcs_regs));
>      r = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave);
>      return r;
>  }
> @@ -1294,6 +1300,10 @@ static int kvm_get_xsave(X86CPU *cpu)
>      env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
>      memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
>              sizeof env->ymmh_regs);
> +    memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],
> +            sizeof env->bnd_regs);
> +    memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],
> +            sizeof(env->bndcs_regs));
>      return 0;
>  }
>  
> diff --git a/target-i386/machine.c b/target-i386/machine.c
> index e568da2..ca8be7d 100644
> --- a/target-i386/machine.c
> +++ b/target-i386/machine.c
> @@ -63,6 +63,36 @@ static const VMStateDescription vmstate_ymmh_reg = {
>  #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
>      VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
>  
> +static const VMStateDescription vmstate_bnd_regs = {
> +    .name = "bnd_regs",
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .minimum_version_id_old = 1,
> +    .fields      = (VMStateField []) {
> +        VMSTATE_UINT64(lb, BNDReg),
> +        VMSTATE_UINT64(ub, BNDReg),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
> +#define VMSTATE_BNDREG_VARS(_field, _state, _n, _v)          \
> +    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_bnd_regs, BNDReg)
> +
> +static const VMStateDescription vmstate_bndcs_regs = {
> +    .name = "bndcs_regs",
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .minimum_version_id_old = 1,
> +    .fields      = (VMStateField []) {
> +        VMSTATE_UINT64(cfg, BNDCSReg),
> +        VMSTATE_UINT64(sts, BNDCSReg),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
> +#define VMSTATE_BNDCSR_VARS(_field, _state, _v)              \
> +    VMSTATE_STRUCT(_field, _state, _v, vmstate_bndcs_regs, BNDCSReg)
> +
>  static const VMStateDescription vmstate_mtrr_var = {
>      .name = "mtrr_var",
>      .version_id = 1,
> @@ -606,6 +636,8 @@ const VMStateDescription vmstate_x86_cpu = {
>          VMSTATE_UINT64_V(env.xcr0, X86CPU, 12),
>          VMSTATE_UINT64_V(env.xstate_bv, X86CPU, 12),
>          VMSTATE_YMMH_REGS_VARS(env.ymmh_regs, X86CPU, CPU_NB_REGS, 12),
> +        VMSTATE_BNDREG_VARS(env.bnd_regs, X86CPU, 4, 12),
> +        VMSTATE_BNDCSR_VARS(env.bndcs_regs, X86CPU, 12),

You need to put these two in a subsection, so that it is not emitted
when MPX is not enabled (i.e. when xstate_bv & (1<<3) == 0).
VMSTATE_BNDCSR_VARS doesn't need to be a separate struct, you can inline
bndcs_regs.cfs and bndcs_regs.sts directly in the subsection.

The rest looks good.

Paolo

>          VMSTATE_END_OF_LIST()
>          /* The above list is not sorted /wrt version numbers, watch out! */
>      },
> -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe
> kvm" in the body of a message to majordomo@vger.kernel.org More
> majordomo info at http://vger.kernel.org/majordomo-info.html
>
Liu, Jinsong Dec. 5, 2013, 3:26 p.m. UTC | #2 
Paolo Bonzini wrote:
> Il 04/12/2013 12:30, Liu, Jinsong ha scritto:
>>>> 
>>>> Almost there.  Migration (vmstate) is still missing.
>>>> 
>> Like this:
>> 
>> ==================
>> From faead85c0dbe62da896e0ed9e165d98e10216968 Mon Sep 17 00:00:00
>> 2001 
>> From: Liu Jinsong <jinsong.liu@intel.com>
>> Date: Wed, 4 Dec 2013 16:56:49 +0800
>> Subject: [PATCH 2/2] target-i386: Intel MPX
>> 
>> Add some MPX related definiation, and hardcode sizes and offsets
>> of xsave features 3 and 4. It also add corresponding part to
>> kvm_get/put_xsave, and vmstate.
>> 
>> Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
>> ---
>>  target-i386/cpu.c     |    4 ++++
>>  target-i386/cpu.h     |   22 +++++++++++++++++++---
>>  target-i386/kvm.c     |   10 ++++++++++
>>  target-i386/machine.c |   32 ++++++++++++++++++++++++++++++++
>>  4 files changed, 65 insertions(+), 3 deletions(-)
>> 
>> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
>> index 544b57f..52ca029 100644
>> --- a/target-i386/cpu.c
>> +++ b/target-i386/cpu.c
>> @@ -336,6 +336,10 @@ typedef struct ExtSaveArea {
>>  static const ExtSaveArea ext_save_areas[] = {
>>      [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
>>              .offset = 0x240, .size = 0x100 },
>> +    [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
>> +            .offset = 0x3c0, .size = 0x40  },
>> +    [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
>> +            .offset = 0x400, .size = 0x10  },
>>  };
>> 
>>  const char *get_register_name_32(unsigned int reg)
>> diff --git a/target-i386/cpu.h b/target-i386/cpu.h
>> index ea373e8..5c1dd17 100644
>> --- a/target-i386/cpu.h
>> +++ b/target-i386/cpu.h
>> @@ -380,9 +380,12 @@
>> 
>>  #define MSR_VM_HSAVE_PA                 0xc0010117
>> 
>> -#define XSTATE_FP                       1
>> -#define XSTATE_SSE                      2
>> -#define XSTATE_YMM                      4
>> +#define XSTATE_FP                       (1ULL << 0)
>> +#define XSTATE_SSE                      (1ULL << 1)
>> +#define XSTATE_YMM                      (1ULL << 2)
>> +#define XSTATE_BNDREGS                  (1ULL << 3)
>> +#define XSTATE_BNDCSR                   (1ULL << 4) +
>> 
>>  /* CPUID feature words */
>>  typedef enum FeatureWord {
>> @@ -545,6 +548,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
>>  #define CPUID_7_0_EBX_ERMS     (1 << 9)
>>  #define CPUID_7_0_EBX_INVPCID  (1 << 10)
>>  #define CPUID_7_0_EBX_RTM      (1 << 11)
>> +#define CPUID_7_0_EBX_MPX      (1 << 14)
>>  #define CPUID_7_0_EBX_RDSEED   (1 << 18)
>>  #define CPUID_7_0_EBX_ADX      (1 << 19)
>>  #define CPUID_7_0_EBX_SMAP     (1 << 20)
>> @@ -695,6 +699,16 @@ typedef union {
>>      uint64_t q;
>>  } MMXReg;
>> 
>> +typedef struct BNDReg {
>> +    uint64_t lb;
>> +    uint64_t ub;
>> +} BNDReg;
>> +
>> +typedef struct BNDCSReg {
>> +    uint64_t cfg;
>> +    uint64_t sts;
>> +} BNDCSReg;
>> +
>>  #ifdef HOST_WORDS_BIGENDIAN
>>  #define XMM_B(n) _b[15 - (n)]
>>  #define XMM_W(n) _w[7 - (n)]
>> @@ -912,6 +926,8 @@ typedef struct CPUX86State {
>> 
>>      uint64_t xstate_bv;
>>      XMMReg ymmh_regs[CPU_NB_REGS];
>> +    BNDReg bnd_regs[4];
>> +    BNDCSReg bndcs_regs;
>> 
>>      uint64_t xcr0;
>> 
>> diff --git a/target-i386/kvm.c b/target-i386/kvm.c
>> index 749aa09..347d3d3 100644
>> --- a/target-i386/kvm.c
>> +++ b/target-i386/kvm.c
>> @@ -980,6 +980,8 @@ static int kvm_put_fpu(X86CPU *cpu)  #define
>>  XSAVE_XMM_SPACE   40 #define XSAVE_XSTATE_BV   128
>>  #define XSAVE_YMMH_SPACE  144
>> +#define XSAVE_BNDREGS     240
>> +#define XSAVE_BNDCSR      256
>> 
>>  static int kvm_put_xsave(X86CPU *cpu)
>>  {
>> @@ -1012,6 +1014,10 @@ static int kvm_put_xsave(X86CPU *cpu)
>>      *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
>>      memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
>>              sizeof env->ymmh_regs);
>> +    memcpy(&xsave->region[XSAVE_BNDREGS], env->bnd_regs,
>> +            sizeof env->bnd_regs);
>> +    memcpy(&xsave->region[XSAVE_BNDCSR], &env->bndcs_regs,
>> +            sizeof(env->bndcs_regs));
>>      r = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave);      return
>>  r; }
>> @@ -1294,6 +1300,10 @@ static int kvm_get_xsave(X86CPU *cpu)
>>      env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
>>      memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
>>              sizeof env->ymmh_regs);
>> +    memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],
>> +            sizeof env->bnd_regs);
>> +    memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],
>> +            sizeof(env->bndcs_regs));
>>      return 0;
>>  }
>> 
>> diff --git a/target-i386/machine.c b/target-i386/machine.c
>> index e568da2..ca8be7d 100644
>> --- a/target-i386/machine.c
>> +++ b/target-i386/machine.c
>> @@ -63,6 +63,36 @@ static const VMStateDescription vmstate_ymmh_reg
>>  = { #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)         
>>      \ VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v,
>> vmstate_ymmh_reg, XMMReg) 
>> 
>> +static const VMStateDescription vmstate_bnd_regs = { +    .name =
>> "bnd_regs", +    .version_id = 1,
>> +    .minimum_version_id = 1,
>> +    .minimum_version_id_old = 1,
>> +    .fields      = (VMStateField []) {
>> +        VMSTATE_UINT64(lb, BNDReg),
>> +        VMSTATE_UINT64(ub, BNDReg),
>> +        VMSTATE_END_OF_LIST()
>> +    }
>> +};
>> +
>> +#define VMSTATE_BNDREG_VARS(_field, _state, _n, _v)          \
>> +    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_bnd_regs,
>> BNDReg) + +static const VMStateDescription vmstate_bndcs_regs = { + 
>> .name = "bndcs_regs", +    .version_id = 1,
>> +    .minimum_version_id = 1,
>> +    .minimum_version_id_old = 1,
>> +    .fields      = (VMStateField []) {
>> +        VMSTATE_UINT64(cfg, BNDCSReg),
>> +        VMSTATE_UINT64(sts, BNDCSReg),
>> +        VMSTATE_END_OF_LIST()
>> +    }
>> +};
>> +
>> +#define VMSTATE_BNDCSR_VARS(_field, _state, _v)              \
>> +    VMSTATE_STRUCT(_field, _state, _v, vmstate_bndcs_regs,
>>  BNDCSReg) + static const VMStateDescription vmstate_mtrr_var = {   
>>      .name = "mtrr_var", .version_id = 1,
>> @@ -606,6 +636,8 @@ const VMStateDescription vmstate_x86_cpu = {
>>          VMSTATE_UINT64_V(env.xcr0, X86CPU, 12),
>>          VMSTATE_UINT64_V(env.xstate_bv, X86CPU, 12),
>>          VMSTATE_YMMH_REGS_VARS(env.ymmh_regs, X86CPU, CPU_NB_REGS,
>> 12), +        VMSTATE_BNDREG_VARS(env.bnd_regs, X86CPU, 4, 12),
>> +        VMSTATE_BNDCSR_VARS(env.bndcs_regs, X86CPU, 12),
> 
> You need to put these two in a subsection, so that it is not emitted
> when MPX is not enabled (i.e. when xstate_bv & (1<<3) == 0).
> VMSTATE_BNDCSR_VARS doesn't need to be a separate struct, you can
> inline bndcs_regs.cfs and bndcs_regs.sts directly in the subsection.
> 
> The rest looks good.
> 
> Paolo

Sorry, those macro seems too opaque to me, I try several ways but fail.
Would you help me to add incremental patch based on current patches?

Thanks,
Jinsong

> 
>>          VMSTATE_END_OF_LIST()
>>          /* The above list is not sorted /wrt version numbers, watch
>> out! */      }, -- 1.7.1 -- To unsubscribe from this list: send the
>> line "unsubscribe 
>> kvm" in the body of a message to majordomo@vger.kernel.org More
>> majordomo info at http://vger.kernel.org/majordomo-info.html
diff mbox

Patch

==================
From faead85c0dbe62da896e0ed9e165d98e10216968 Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Wed, 4 Dec 2013 16:56:49 +0800
Subject: [PATCH 2/2] target-i386: Intel MPX

Add some MPX related definiation, and hardcode sizes and offsets
of xsave features 3 and 4. It also add corresponding part to
kvm_get/put_xsave, and vmstate.

Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
---
 target-i386/cpu.c     |    4 ++++
 target-i386/cpu.h     |   22 +++++++++++++++++++---
 target-i386/kvm.c     |   10 ++++++++++
 target-i386/machine.c |   32 ++++++++++++++++++++++++++++++++
 4 files changed, 65 insertions(+), 3 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 544b57f..52ca029 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -336,6 +336,10 @@  typedef struct ExtSaveArea {
 static const ExtSaveArea ext_save_areas[] = {
     [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
             .offset = 0x240, .size = 0x100 },
+    [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
+            .offset = 0x3c0, .size = 0x40  },
+    [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
+            .offset = 0x400, .size = 0x10  },
 };
 
 const char *get_register_name_32(unsigned int reg)
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index ea373e8..5c1dd17 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -380,9 +380,12 @@ 
 
 #define MSR_VM_HSAVE_PA                 0xc0010117
 
-#define XSTATE_FP                       1
-#define XSTATE_SSE                      2
-#define XSTATE_YMM                      4
+#define XSTATE_FP                       (1ULL << 0)
+#define XSTATE_SSE                      (1ULL << 1)
+#define XSTATE_YMM                      (1ULL << 2)
+#define XSTATE_BNDREGS                  (1ULL << 3)
+#define XSTATE_BNDCSR                   (1ULL << 4)
+
 
 /* CPUID feature words */
 typedef enum FeatureWord {
@@ -545,6 +548,7 @@  typedef uint32_t FeatureWordArray[FEATURE_WORDS];
 #define CPUID_7_0_EBX_ERMS     (1 << 9)
 #define CPUID_7_0_EBX_INVPCID  (1 << 10)
 #define CPUID_7_0_EBX_RTM      (1 << 11)
+#define CPUID_7_0_EBX_MPX      (1 << 14)
 #define CPUID_7_0_EBX_RDSEED   (1 << 18)
 #define CPUID_7_0_EBX_ADX      (1 << 19)
 #define CPUID_7_0_EBX_SMAP     (1 << 20)
@@ -695,6 +699,16 @@  typedef union {
     uint64_t q;
 } MMXReg;
 
+typedef struct BNDReg {
+    uint64_t lb;
+    uint64_t ub;
+} BNDReg;
+
+typedef struct BNDCSReg {
+    uint64_t cfg;
+    uint64_t sts;
+} BNDCSReg;
+
 #ifdef HOST_WORDS_BIGENDIAN
 #define XMM_B(n) _b[15 - (n)]
 #define XMM_W(n) _w[7 - (n)]
@@ -912,6 +926,8 @@  typedef struct CPUX86State {
 
     uint64_t xstate_bv;
     XMMReg ymmh_regs[CPU_NB_REGS];
+    BNDReg bnd_regs[4];
+    BNDCSReg bndcs_regs;
 
     uint64_t xcr0;
 
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 749aa09..347d3d3 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -980,6 +980,8 @@  static int kvm_put_fpu(X86CPU *cpu)
 #define XSAVE_XMM_SPACE   40
 #define XSAVE_XSTATE_BV   128
 #define XSAVE_YMMH_SPACE  144
+#define XSAVE_BNDREGS     240
+#define XSAVE_BNDCSR      256
 
 static int kvm_put_xsave(X86CPU *cpu)
 {
@@ -1012,6 +1014,10 @@  static int kvm_put_xsave(X86CPU *cpu)
     *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
     memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
             sizeof env->ymmh_regs);
+    memcpy(&xsave->region[XSAVE_BNDREGS], env->bnd_regs,
+            sizeof env->bnd_regs);
+    memcpy(&xsave->region[XSAVE_BNDCSR], &env->bndcs_regs,
+            sizeof(env->bndcs_regs));
     r = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave);
     return r;
 }
@@ -1294,6 +1300,10 @@  static int kvm_get_xsave(X86CPU *cpu)
     env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
     memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
             sizeof env->ymmh_regs);
+    memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],
+            sizeof env->bnd_regs);
+    memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],
+            sizeof(env->bndcs_regs));
     return 0;
 }
 
diff --git a/target-i386/machine.c b/target-i386/machine.c
index e568da2..ca8be7d 100644
--- a/target-i386/machine.c
+++ b/target-i386/machine.c
@@ -63,6 +63,36 @@  static const VMStateDescription vmstate_ymmh_reg = {
 #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
 
+static const VMStateDescription vmstate_bnd_regs = {
+    .name = "bnd_regs",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT64(lb, BNDReg),
+        VMSTATE_UINT64(ub, BNDReg),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+#define VMSTATE_BNDREG_VARS(_field, _state, _n, _v)          \
+    VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_bnd_regs, BNDReg)
+
+static const VMStateDescription vmstate_bndcs_regs = {
+    .name = "bndcs_regs",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .minimum_version_id_old = 1,
+    .fields      = (VMStateField []) {
+        VMSTATE_UINT64(cfg, BNDCSReg),
+        VMSTATE_UINT64(sts, BNDCSReg),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+#define VMSTATE_BNDCSR_VARS(_field, _state, _v)              \
+    VMSTATE_STRUCT(_field, _state, _v, vmstate_bndcs_regs, BNDCSReg)
+
 static const VMStateDescription vmstate_mtrr_var = {
     .name = "mtrr_var",
     .version_id = 1,
@@ -606,6 +636,8 @@  const VMStateDescription vmstate_x86_cpu = {
         VMSTATE_UINT64_V(env.xcr0, X86CPU, 12),
         VMSTATE_UINT64_V(env.xstate_bv, X86CPU, 12),
         VMSTATE_YMMH_REGS_VARS(env.ymmh_regs, X86CPU, CPU_NB_REGS, 12),
+        VMSTATE_BNDREG_VARS(env.bnd_regs, X86CPU, 4, 12),
+        VMSTATE_BNDCSR_VARS(env.bndcs_regs, X86CPU, 12),
         VMSTATE_END_OF_LIST()
         /* The above list is not sorted /wrt version numbers, watch out! */
     },