From patchwork Sun Mar 18 11:57:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 147370 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id BEA79B6FAF for ; Sun, 18 Mar 2012 22:57:58 +1100 (EST) Received: from localhost ([::1]:59421 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9EkF-0006oh-Pt for incoming@patchwork.ozlabs.org; Sun, 18 Mar 2012 07:57:55 -0400 Received: from eggs.gnu.org ([208.118.235.92]:53823) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9Ek9-0006oF-S3 for qemu-devel@nongnu.org; Sun, 18 Mar 2012 07:57:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S9Ek7-0004yn-VT for qemu-devel@nongnu.org; Sun, 18 Mar 2012 07:57:49 -0400 Received: from mail-iy0-f173.google.com ([209.85.210.173]:39023) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S9Ek7-0004ya-NG for qemu-devel@nongnu.org; Sun, 18 Mar 2012 07:57:47 -0400 Received: by iafj26 with SMTP id j26so9096482iaf.4 for ; Sun, 18 Mar 2012 04:57:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:from:date:message-id:subject:to:content-type; bh=jt6pDKHjpHcrNjSsrbvc/whMe5VPkFugXHvM4eeMUlM=; b=g5QUMIaYluv/w68KO1pCyrIOrY5F2+n6m7//i67j3XdOHTm+xz7py1RiEsC9wM7UcJ GkEo2ONUw231atBwJuK4gMIObdlo/yYbqZu1oSPIeO9/UCg1d1bPivrPXOdg43TeQ96D Uocpq0/yBkZ556NUJXkps1u5rapR3Gx+CHlR3nSHfDpTlOc49AO19PUg7wP+RnD8ehyy Lhcrvholtk088vb9g9Ykl6buzVc/1KXqOkekBsz+hX5ZV5P/qUs12bxRYutbrJ7fXcOI 3zXXMn+6cO6EQfOTKhF8N+jftdeOANzUNwZeuZ1tdGOzfXm6B4CN7sfp6tM0Ye21Az41 xNAQ== Received: by 10.50.212.97 with SMTP id nj1mr3584244igc.65.1332071865776; Sun, 18 Mar 2012 04:57:45 -0700 (PDT) MIME-Version: 1.0 Received: by 10.50.75.41 with HTTP; Sun, 18 Mar 2012 04:57:25 -0700 (PDT) From: Blue Swirl Date: Sun, 18 Mar 2012 11:57:25 +0000 Message-ID: To: Avi Kivity , Mark Cave-Ayland , qemu-devel X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.173 Subject: [Qemu-devel] [PATCH] sparc: pass page aligned addresses to tlb_set_page X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Mask incoming page address early so that resolved addresses are page aligned. Remove further address masking. Signed-off-by: Blue Swirl Tested-by: Artyom Tarasenko --- target-sparc/mmu_helper.c | 19 ++++++++----------- 1 files changed, 8 insertions(+), 11 deletions(-) } @@ -206,11 +205,11 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, target_ulong page_size; int error_code = 0, prot, access_index; + address &= TARGET_PAGE_MASK; error_code = get_physical_address(env, &paddr, &prot, &access_index, address, rw, mmu_idx, &page_size); + vaddr = address; if (error_code == 0) { - vaddr = address & TARGET_PAGE_MASK; - paddr &= TARGET_PAGE_MASK; #ifdef DEBUG_MMU printf("Translate at " TARGET_FMT_lx " -> " TARGET_FMT_plx ", vaddr " TARGET_FMT_lx "\n", address, paddr, vaddr); @@ -230,7 +229,6 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, permissions. If no mapping is available, redirect accesses to neverland. Fake/overridden mappings will be flushed when switching to normal mode. */ - vaddr = address & TARGET_PAGE_MASK; prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; tlb_set_page(env, vaddr, paddr, prot, mmu_idx, TARGET_PAGE_SIZE); return 0; @@ -704,17 +702,16 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, int mmu_idx) { - target_ulong virt_addr, vaddr; + target_ulong vaddr; target_phys_addr_t paddr; target_ulong page_size; int error_code = 0, prot, access_index; + address &= TARGET_PAGE_MASK; error_code = get_physical_address(env, &paddr, &prot, &access_index, address, rw, mmu_idx, &page_size); if (error_code == 0) { - virt_addr = address & TARGET_PAGE_MASK; - vaddr = virt_addr + ((address & TARGET_PAGE_MASK) & - (TARGET_PAGE_SIZE - 1)); + vaddr = address; trace_mmu_helper_mmu_fault(address, paddr, mmu_idx, env->tl, env->dmmu.mmu_primary_context, diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index 11fb9f5..cb73c44 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -150,18 +150,17 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical case 3: /* Reserved */ return (3 << 8) | (4 << 2); case 2: /* L3 PTE */ - page_offset = (address & TARGET_PAGE_MASK) & - (TARGET_PAGE_SIZE - 1); + page_offset = 0; } *page_size = TARGET_PAGE_SIZE; break; case 2: /* L2 PTE */ - page_offset = address & 0x3ffff; + page_offset = address & 0x3f000; *page_size = 0x40000; } break; case 2: /* L1 PTE */ - page_offset = address & 0xffffff; + page_offset = address & 0xfff000; *page_size = 0x1000000; }