From patchwork Thu May 5 03:03:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BrillyWu@viatech.com.cn X-Patchwork-Id: 94198 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4044DB6F1C for ; Thu, 5 May 2011 13:25:49 +1000 (EST) Received: from localhost ([::1]:52388 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHpCD-0008Bu-Uq for incoming@patchwork.ozlabs.org; Wed, 04 May 2011 23:25:45 -0400 Received: from eggs.gnu.org ([140.186.70.92]:48075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHpC6-0008Bn-LQ for qemu-devel@nongnu.org; Wed, 04 May 2011 23:25:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QHpC5-0000Kb-Iu for qemu-devel@nongnu.org; Wed, 04 May 2011 23:25:38 -0400 Received: from exchtp08.via.com.tw ([61.66.243.7]:25434) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QHpC4-0000K6-Tp for qemu-devel@nongnu.org; Wed, 04 May 2011 23:25:37 -0400 Received: from mailtp.via.com.tw ([10.5.254.18]) by exchtp08.via.com.tw with Microsoft SMTPSVC(6.0.3790.4675); Thu, 5 May 2011 11:03:11 +0800 Received: from exchsg04.s3graphics.com ([10.3.254.212]) by mailtp.via.com.tw with Microsoft SMTPSVC(6.0.3790.4675); Thu, 5 May 2011 11:03:05 +0800 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Date: Thu, 5 May 2011 11:03:03 +0800 Message-ID: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH] qemu-kvm: Add CPUID support for VIA CPU Thread-Index: AcwK0PMVmcccmlJ/Q+WOtA0IDn6cJA== From: To: X-OriginalArrivalTime: 05 May 2011 03:03:05.0302 (UTC) FILETIME=[F42DCF60:01CC0AD0] X-detected-operating-system: by eggs.gnu.org: Windows 2000 SP4, XP SP1+ X-Received-From: 61.66.243.7 Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [Qemu-devel] [PATCH] qemu-kvm: Add CPUID support for VIA CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When KVM is running on VIA CPU with host cpu's model, the feautures of VIA CPU will be passed into kvm guest by calling the CPUID instruction for Centaur. Signed-off-by: BrillyWu Signed-off-by: KaryJin --- target-i386/cpu.h | 7 +++++++ target-i386/cpuid.c | 48 +++++++++++++++++++++++++++++++++++++++++++++++- target-i386/kvm.c | 15 +++++++++++++++ 3 files changed, 69 insertions(+), 1 deletion(-) #ifdef KVM_CAP_MCE --- a/target-i386/cpu.h 2011-05-05 09:01:11.742328398 +0800 +++ b/target-i386/cpu.h 2011-05-05 10:47:32.112329696 +0800 @@ -441,6 +441,10 @@ #define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */ #define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */ +#define CPUID_VENDOR_VIA_1 0x746e6543 /* "Cent" */ +#define CPUID_VENDOR_VIA_2 0x48727561 /* "aurH" */ +#define CPUID_VENDOR_VIA_3 0x736c7561 /* "auls" */ + #define CPUID_MWAIT_IBE (1 << 1) /* Interrupts can exit capability */ #define CPUID_MWAIT_EMX (1 << 0) /* enumeration supported */ @@ -721,6 +725,9 @@ typedef struct CPUX86State { uint32_t cpuid_ext3_features; uint32_t cpuid_apic_id; int cpuid_vendor_override; + /*Store the results of Centaur's CPUID instructions*/ + uint32_t cpuid_xlevel2; + uint32_t cpuid_ext4_features; /* MTRRs */ uint64_t mtrr_fixed[11]; --- a/target-i386/cpuid.c 2011-05-05 09:01:05.352331142 +0800 +++ b/target-i386/cpuid.c 2011-05-05 10:47:41.102330705 +0800 @@ -230,6 +230,9 @@ typedef struct x86_def_t { char model_id[48]; int vendor_override; uint32_t flags; + /*Store the results of Centaur's CPUID instructions*/ + uint32_t ext4_features; + uint32_t xlevel2; } x86_def_t; #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) @@ -522,6 +525,17 @@ static int cpu_x86_fill_host(x86_def_t * cpu_x86_fill_model_id(x86_cpu_def->model_id); x86_cpu_def->vendor_override = 0; + /* Call Centaur's CPUID instruction. */ + if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 && + x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 && + x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) { + host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx); + if (eax >= 0xC0000001) { + x86_cpu_def->xlevel2 = eax; /*support VIA max extended level*/ + host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx); + x86_cpu_def->ext4_features = edx; + } + } /* * Every SVM feature requires emulation support in KVM - so we can't just @@ -855,6 +869,8 @@ int cpu_x86_register (CPUX86State *env, env->cpuid_xlevel = def->xlevel; env->cpuid_kvm_features = def->kvm_features; env->cpuid_svm_features = def->svm_features; + env->cpuid_ext4_features = def->ext4_features; + env->cpuid_xlevel2 = def->xlevel2; if (!kvm_enabled()) { env->cpuid_features &= TCG_FEATURES; env->cpuid_ext_features &= TCG_EXT_FEATURES; @@ -1034,7 +1050,15 @@ void cpu_x86_cpuid(CPUX86State *env, uin uint32_t *ecx, uint32_t *edx) { /* test if maximum index reached */ - if (index & 0x80000000) { + if ((index & 0xC0000000) == 0xC0000000) { + /* Handle the Centaur's CPUID instruction.* + * If cpuid_xlevel2 is "0", then put into the* + * default case. */ + if (env->cpuid_xlevel2 == 0) + index = 0xF0000000; + else if (index > env->cpuid_xlevel2) + index = env->cpuid_xlevel2; + } else if (index & 0x80000000) { if (index > env->cpuid_xlevel) index = env->cpuid_level; } else { @@ -1256,6 +1280,28 @@ void cpu_x86_cpuid(CPUX86State *env, uin *edx = 0; } break; + case 0xC0000000: + *eax = env->cpuid_xlevel2; + *ebx = 0; + *ecx = 0; + *edx = 0; + break; + case 0xC0000001: + /* Support for VIA CPU's CPUID instruction */ + *eax = env->cpuid_version; + *ebx = 0; + *ecx = 0; + *edx = env->cpuid_ext4_features; + break; + case 0xC0000002: + case 0xC0000003: + case 0xC0000004: + /*Reserved for the future, and now filled with zero*/ + *eax = 0; + *ebx = 0; + *ecx = 0; + *edx = 0; + break; default: /* reserved values: zero */ *eax = 0; --- a/target-i386/kvm.c 2011-05-05 09:01:17.182326246 +0800 +++ b/target-i386/kvm.c 2011-05-05 10:47:48.312331989 +0800 @@ -496,6 +496,21 @@ int kvm_arch_init_vcpu(CPUState *env) cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); } + /* Call Centaur's CPUID instructions they are supported. */ + if (env->cpuid_xlevel2 > 0) { + env->cpuid_ext4_features &= + kvm_arch_get_supported_cpuid(env, 0xC0000001, 0, R_EDX); + cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused); + + for (i = 0xC0000000; i <= limit; i++) { + c = &cpuid_data.entries[cpuid_i++]; + + c->function = i; + c->flags = 0; + cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + } + } + cpuid_data.cpuid.nent = cpuid_i;