| Message ID | BL2PR03MB44998353E70A7C26E96777D836B0@BL2PR03MB449.namprd03.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
On 19.12.14 15:20, Amit Tomar wrote: > This patch sets the GPIO controller interrupt number to 47,not 43 (and the Device tree agrees). > > > Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> Thanks, applied to ppc-next with modified commit message. Let's try to improve the patch description next time ;). Alex Subject: [PATCH] PPC: e500: Fix GPIO controller interrupt number The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem because IRQ 43 is occupied by the I2C controller which we want to implement next, so we'd have a conflict on that IRQ number. Move the GPIO controller to IRQ 47 where it belongs. Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2832fc0..2cd69a9 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -65,7 +65,7 @@ #define MPC8544_UTIL_OFFSET 0xe0000ULL #define MPC8544_SPIN_BASE 0xEF000000ULL #define MPC8XXX_GPIO_OFFSET 0x000FF000ULL -#define MPC8XXX_GPIO_IRQ 43 +#define MPC8XXX_GPIO_IRQ 47 struct boot_info {
This patch sets the GPIO controller interrupt number to 47,not 43 (and the Device tree agrees). Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> --- hw/ppc/e500.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.7.9.5