From patchwork Sun Jun 19 21:05:25 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 101007 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 91891B6FEE for ; Mon, 20 Jun 2011 08:22:57 +1000 (EST) Received: from localhost ([::1]:59201 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYQOL-0005ly-Rr for incoming@patchwork.ozlabs.org; Sun, 19 Jun 2011 18:22:54 -0400 Received: from eggs.gnu.org ([140.186.70.92]:45788) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYPBj-00032F-MX for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:05:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QYPBh-0008Ec-G9 for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:05:47 -0400 Received: from mail-qw0-f45.google.com ([209.85.216.45]:43697) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QYPBh-00085I-8P for qemu-devel@nongnu.org; Sun, 19 Jun 2011 17:05:45 -0400 Received: by mail-qw0-f45.google.com with SMTP id 8so441368qwj.4 for ; Sun, 19 Jun 2011 14:05:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=hA13URtrqUnv1IVRb+Z2P++xhHkWpHJ/pGDJclO/jeY=; b=i18C8FIS6J94mUUhubkyNBAVWGUHu015iCdNUWBXg5YE23louFXw18TS+ORE9/haR+ kb9i85PJNehgM2n3yL7DjDgLDBhU4VNSQtxBwf/WvgY6icK6PE8pXktP6VyC5ACMJA5G 5OVxsStbBPqzkCoCBq7FYFKiPBoXCdH2nGb6Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=ck9wOhuGXR8hFtk/BzO27bEukPH5y7LwXihnwL+JNY8vApO0U0qyT5hQRKRIfcBa7Y ouuBGhjHONX02+4P8IyWzSaM1QLGo2A1/RHqOQa6s4ppW/2x12JFD6bgqkbEt9WBb/W+ q3hovRsjpZiyK31Huo+73gjw223IOxqWEvAOQ= Received: by 10.224.218.69 with SMTP id hp5mr3662511qab.17.1308517545111; Sun, 19 Jun 2011 14:05:45 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.2.138 with HTTP; Sun, 19 Jun 2011 14:05:25 -0700 (PDT) From: Blue Swirl Date: Mon, 20 Jun 2011 00:05:25 +0300 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.45 Subject: [Qemu-devel] [PATCH 06/18] TCG/Sparc64: use stack for TCG temps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use stack instead of temp_buf array in CPUState for TCG temps. On Sparc64, stack pointer is not aligned but there is a fixed bias of 2047, so don't try to enforce alignment. Signed-off-by: Blue Swirl --- tcg/sparc/tcg-target.c | 7 ++++--- tcg/tcg.c | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 86f8c1e..ac76e11 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -693,8 +693,11 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret, /* Generate global QEMU prologue and epilogue code */ static void tcg_target_qemu_prologue(TCGContext *s) { + tcg_set_frame(s, TCG_REG_I6, TCG_TARGET_CALL_STACK_OFFSET, + CPU_TEMP_BUF_NLONGS * (int)sizeof(long)); tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | - INSN_IMM13(-TCG_TARGET_STACK_MINFRAME)); + INSN_IMM13(-(TCG_TARGET_STACK_MINFRAME + + CPU_TEMP_BUF_NLONGS * (int)sizeof(long)))); tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) | INSN_RS2(TCG_REG_G0)); tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0); @@ -1566,6 +1569,4 @@ static void tcg_target_init(TCGContext *s) tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); tcg_regset_set_reg(s->reserved_regs, TCG_REG_O7); tcg_add_target_add_op_defs(sparc_op_defs); - tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf), - CPU_TEMP_BUF_NLONGS * sizeof(long)); } diff --git a/tcg/tcg.c b/tcg/tcg.c index 29cd7a2..c05413b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1439,9 +1439,11 @@ static void temp_allocate_frame(TCGContext *s, int temp) { TCGTemp *ts; ts = &s->temps[temp]; +#ifndef __sparc_v9__ /* Sparc64 stack is accessed with offset of 2047 */ s->current_frame_offset = (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1); +#endif if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > s->frame_end) { tcg_abort();