From patchwork Sun Oct 31 11:11:08 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 69704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 12363B6EF2 for ; Sun, 31 Oct 2010 22:21:19 +1100 (EST) Received: from localhost ([127.0.0.1]:36463 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PCVyB-0001nw-Fz for incoming@patchwork.ozlabs.org; Sun, 31 Oct 2010 07:21:03 -0400 Received: from [140.186.70.92] (port=48343 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PCVqk-0000VF-Ql for qemu-devel@nongnu.org; Sun, 31 Oct 2010 07:13:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PCVow-0004Ej-MF for qemu-devel@nongnu.org; Sun, 31 Oct 2010 07:11:35 -0400 Received: from mail-gy0-f173.google.com ([209.85.160.173]:44198) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PCVow-0004EY-Ih for qemu-devel@nongnu.org; Sun, 31 Oct 2010 07:11:30 -0400 Received: by gya6 with SMTP id 6so2967024gya.4 for ; Sun, 31 Oct 2010 04:11:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:mime-version:received:from:date :message-id:subject:to:content-type; bh=AFxeyifK8sItyQ0BBc4PYmUJr3hl4f396TrfGmtaY6w=; b=ZRGFfaHZULp03nCJZcEulYTBErhEsXhXPtKyOXaUJi0xzw+oP+XO7QA86Lz8F4njOC KWEJjMOLq81vYKoSrUgWI5ZXoO4hAqoVwrSv2g59/P/+wwtKUubxgajNSOKPG+KW7/5o 9Be3RIYIx/iHqKTAwRMB6lDjGKgDZk+FLQGvY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=BxZWCenS6WDNDaf/iY51phobL4mz6cTSJ/Vy3ZK6woeHwViX19cVt7jn+Wg0cq4rYP nVnWUQqZ0uuRro2xFCKBecBZpp9wn3kwxoKPtdWRVm0+wNInqXwCLSF7qmQr6kIvM8we xodyq3Up8QeQMn2aXGtnSTU1ONjVjwqQxDCaE= Received: by 10.229.216.73 with SMTP id hh9mr5673566qcb.298.1288523489003; Sun, 31 Oct 2010 04:11:29 -0700 (PDT) MIME-Version: 1.0 Received: by 10.229.185.78 with HTTP; Sun, 31 Oct 2010 04:11:08 -0700 (PDT) From: Blue Swirl Date: Sun, 31 Oct 2010 11:11:08 +0000 Message-ID: To: qemu-devel , Artyom Tarasenko X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Subject: [Qemu-devel] [PATCH] sparc32_dma: separate ledma and espdma X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org ESP and Lance DMA controllers are not identical. Separate the controllers on VMState and instantiation level. NB: This change breaks savevm and migration compatibility. Signed-off-by: Blue Swirl --- Perhaps the compat properties could be used to retain compatibility. But if nobody cares (as I suspect), let's just break it. Further changes can either use s->is_ledma or make the state structures separate. hw/sparc32_dma.c | 65 ++++++++++++++++++++++++++++++++++++++++++++--------- hw/sun4m.c | 16 ++++++------ 2 files changed, 62 insertions(+), 19 deletions(-) s = sysbus_from_qdev(dev); @@ -862,10 +862,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, } espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[18], - iommu, &espdma_irq); + iommu, &espdma_irq, "espdma"); ledma = sparc32_dma_init(hwdef->dma_base + 16ULL, - slavio_irq[16], iommu, &ledma_irq); + slavio_irq[16], iommu, &ledma_irq, "ledma"); if (graphic_depth != 8 && graphic_depth != 24) { fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); @@ -1524,10 +1524,10 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size, sbi_irq[0]); espdma = sparc32_dma_init(hwdef->espdma_base, sbi_irq[3], - iounits[0], &espdma_irq); + iounits[0], &espdma_irq, "espdma"); ledma = sparc32_dma_init(hwdef->ledma_base, sbi_irq[4], - iounits[0], &ledma_irq); + iounits[0], &ledma_irq, "ledma"); if (graphic_depth != 8 && graphic_depth != 24) { fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); @@ -1707,10 +1707,10 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size, slavio_irq[1]); espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[2], - iommu, &espdma_irq); + iommu, &espdma_irq, "espdma"); ledma = sparc32_dma_init(hwdef->dma_base + 16ULL, - slavio_irq[3], iommu, &ledma_irq); + slavio_irq[3], iommu, &ledma_irq, "ledma"); if (graphic_depth != 8 && graphic_depth != 24) { fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth); diff --git a/hw/sparc32_dma.c b/hw/sparc32_dma.c index 0904188..f0c5d88 100644 --- a/hw/sparc32_dma.c +++ b/hw/sparc32_dma.c @@ -65,6 +65,7 @@ struct DMAState { qemu_irq irq; void *iommu; qemu_irq gpio[2]; + int is_ledma; }; enum { @@ -239,18 +240,29 @@ static void dma_reset(DeviceState *d) s->dmaregs[0] = DMA_VER; } -static const VMStateDescription vmstate_dma = { - .name ="sparc32_dma", - .version_id = 2, - .minimum_version_id = 2, - .minimum_version_id_old = 2, +static const VMStateDescription vmstate_ledma = { + .name ="ledma", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, .fields = (VMStateField []) { VMSTATE_UINT32_ARRAY(dmaregs, DMAState, DMA_REGS), VMSTATE_END_OF_LIST() } }; -static int sparc32_dma_init1(SysBusDevice *dev) +static const VMStateDescription vmstate_espdma = { + .name ="espdma", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField []) { + VMSTATE_UINT32_ARRAY(dmaregs, DMAState, DMA_REGS), + VMSTATE_END_OF_LIST() + } +}; + +static int sparc32_dma_common_init(SysBusDevice *dev) { DMAState *s = FROM_SYSBUS(DMAState, dev); int dma_io_memory; @@ -266,11 +278,41 @@ static int sparc32_dma_init1(SysBusDevice *dev) return 0; } -static SysBusDeviceInfo sparc32_dma_info = { - .init = sparc32_dma_init1, - .qdev.name = "sparc32_dma", +static int ledma_init(SysBusDevice *dev) +{ + DMAState *s = FROM_SYSBUS(DMAState, dev); + + s->is_ledma = 1; + + return sparc32_dma_common_init(dev); +} + +static int espdma_init(SysBusDevice *dev) +{ + DMAState *s = FROM_SYSBUS(DMAState, dev); + + s->is_ledma = 0; + + return sparc32_dma_common_init(dev); +} + +static SysBusDeviceInfo ledma_info = { + .init = ledma_init, + .qdev.name = "ledma", + .qdev.size = sizeof(DMAState), + .qdev.vmsd = &vmstate_ledma, + .qdev.reset = dma_reset, + .qdev.props = (Property[]) { + DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu), + DEFINE_PROP_END_OF_LIST(), + } +}; + +static SysBusDeviceInfo espdma_info = { + .init = espdma_init, + .qdev.name = "espdma", .qdev.size = sizeof(DMAState), - .qdev.vmsd = &vmstate_dma, + .qdev.vmsd = &vmstate_espdma, .qdev.reset = dma_reset, .qdev.props = (Property[]) { DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu), @@ -280,7 +322,8 @@ static SysBusDeviceInfo sparc32_dma_info = { static void sparc32_dma_register_devices(void) { - sysbus_register_withprop(&sparc32_dma_info); + sysbus_register_withprop(&ledma_info); + sysbus_register_withprop(&espdma_info); } device_init(sparc32_dma_register_devices) diff --git a/hw/sun4m.c b/hw/sun4m.c index 4795b3f..302a7b7 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -378,12 +378,12 @@ static void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq) } static void *sparc32_dma_init(target_phys_addr_t daddr, qemu_irq parent_irq, - void *iommu, qemu_irq *dev_irq) + void *iommu, qemu_irq *dev_irq, const char *name) { DeviceState *dev; SysBusDevice *s; - dev = qdev_create(NULL, "sparc32_dma"); + dev = qdev_create(NULL, name); qdev_prop_set_ptr(dev, "iommu_opaque", iommu); qdev_init_nofail(dev);