diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index aa1fd63..8078d92 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -26,17 +26,11 @@
 #include "cpu.h"
 #include "exec-all.h"
 #include "qemu-common.h"
+#include "trace.h"

 //#define DEBUG_MMU
 //#define DEBUG_FEATURES

-#ifdef DEBUG_MMU
-#define DPRINTF_MMU(fmt, ...) \
-    do { printf("MMU: " fmt , ## __VA_ARGS__); } while (0)
-#else
-#define DPRINTF_MMU(fmt, ...) do {} while (0)
-#endif
-
 static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);

 /* Sparc MMU emulation */
@@ -240,10 +234,7 @@ int cpu_sparc_handle_mmu_fault (CPUState *env,
target_ulong address, int rw,
     if (error_code == 0) {
         vaddr = address & TARGET_PAGE_MASK;
         paddr &= TARGET_PAGE_MASK;
-#ifdef DEBUG_MMU
-        printf("Translate at " TARGET_FMT_lx " -> " TARGET_FMT_plx ", vaddr "
-               TARGET_FMT_lx "\n", address, paddr, vaddr);
-#endif
+        trace_sparc32_translate(address, paddr, vaddr, mmu_idx);
         tlb_set_page(env, vaddr, paddr, prot, mmu_idx, page_size);
         return 0;
     }
@@ -466,16 +457,10 @@ static int get_physical_address_data(CPUState *env,
             if ((env->dtlb[i].tte & 0x4) && is_user) {
                 fault_type |= 1; /* privilege violation */
                 env->exception_index = TT_DFAULT;
-
-                DPRINTF_MMU("DFAULT at %" PRIx64 " context %" PRIx64
-                            " mmu_idx=%d tl=%d\n",
-                            address, context, mmu_idx, env->tl);
+                trace_sparc64_dfault(address, context, mmu_idx, env->tl);
             } else if (!(env->dtlb[i].tte & 0x2) && (rw == 1)) {
                 env->exception_index = TT_DPROT;
-
-                DPRINTF_MMU("DPROT at %" PRIx64 " context %" PRIx64
-                            " mmu_idx=%d tl=%d\n",
-                            address, context, mmu_idx, env->tl);
+                trace_sparc64_dprot(address, context, mmu_idx, env->tl);
             } else {
                 *prot = PAGE_READ;
                 if (env->dtlb[i].tte & 0x2)
@@ -502,9 +487,7 @@ static int get_physical_address_data(CPUState *env,
         }
     }

-    DPRINTF_MMU("DMISS at %" PRIx64 " context %" PRIx64 "\n",
-                address, context);
-
+    trace_sparc64_dmiss(address, context);
     env->dmmu.tag_access = (address & ~0x1fffULL) | context;
     env->exception_index = TT_DMISS;
     return 1;
@@ -549,9 +532,7 @@ static int get_physical_address_code(CPUState *env,

                 env->immu.tag_access = (address & ~0x1fffULL) | context;

-                DPRINTF_MMU("TFAULT at %" PRIx64 " context %" PRIx64 "\n",
-                            address, context);
-
+                trace_sparc64_tfault(address, context);
                 return 1;
             }
             *prot = PAGE_EXEC;
@@ -560,9 +541,7 @@ static int get_physical_address_code(CPUState *env,
         }
     }

-    DPRINTF_MMU("TMISS at %" PRIx64 " context %" PRIx64 "\n",
-                address, context);
-
+    trace_sparc64_tmiss(address, context);
     /* Context is stored in DMMU (dmmuregs[1]) also for IMMU */
     env->immu.tag_access = (address & ~0x1fffULL) | context;
     env->exception_index = TT_TMISS;
@@ -578,21 +557,14 @@ static int get_physical_address(CPUState *env,
target_phys_addr_t *physical,
        everything when an entry is evicted.  */
     *page_size = TARGET_PAGE_SIZE;

-#if defined (DEBUG_MMU)
     /* safety net to catch wrong softmmu index use from dynamic code */
     if (env->tl > 0 && mmu_idx != MMU_NUCLEUS_IDX) {
-        DPRINTF_MMU("get_physical_address %s tl=%d mmu_idx=%d"
-                    " primary context=%" PRIx64
-                    " secondary context=%" PRIx64
-                " address=%" PRIx64
-                "\n",
-                (rw == 2 ? "CODE" : "DATA"),
-                env->tl, mmu_idx,
-                env->dmmu.mmu_primary_context,
-                env->dmmu.mmu_secondary_context,
-                address);
+        trace_sparc64_get_physical_address((rw == 2 ? "CODE" : "DATA"),
+                                           env->tl, mmu_idx,
+                                           env->dmmu.mmu_primary_context,
+                                           env->dmmu.mmu_secondary_context,
+                                           address);
     }
-#endif

     if (rw == 2)
         return get_physical_address_code(env, physical, prot, address,
@@ -618,16 +590,9 @@ int cpu_sparc_handle_mmu_fault (CPUState *env,
target_ulong address, int rw,
         vaddr = virt_addr + ((address & TARGET_PAGE_MASK) &
                              (TARGET_PAGE_SIZE - 1));

-        DPRINTF_MMU("Translate at %" PRIx64 " -> %" PRIx64 ","
-                    " vaddr %" PRIx64
-                    " mmu_idx=%d"
-                    " tl=%d"
-                    " primary context=%" PRIx64
-                    " secondary context=%" PRIx64
-                    "\n",
-                    address, paddr, vaddr, mmu_idx, env->tl,
-                    env->dmmu.mmu_primary_context,
-                    env->dmmu.mmu_secondary_context);
+        trace_sparc64_translate(address, paddr, vaddr, mmu_idx,
+                                env->dmmu.mmu_primary_context,
+                                env->dmmu.mmu_secondary_context);

         tlb_set_page(env, vaddr, paddr, prot, mmu_idx, page_size);
         return 0;
diff --git a/trace-events b/trace-events
index 4300178..da4c208 100644
--- a/trace-events
+++ b/trace-events
@@ -69,3 +69,13 @@ disable cpu_out(unsigned int addr, unsigned int
val) "addr %#x value %u"
 # balloon.c
 # Since requests are raised via monitor, not many tracepoints are needed.
 disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
+
+# target-sparc/helper.c
+disable sparc64_dfault(uint64_t address, uint64_t context, int
mmu_idx, uint32_t tl) "DFAULT at %" PRIx64 " context %" PRIx64
"mmu_idx=%d tl=%d"
+disable sparc64_dprot(uint64_t address, uint64_t context, int
mmu_idx, uint32_t tl) "DFAULT at %" PRIx64 " context %" PRIx64
"mmu_idx=%d tl=%d"
+disable sparc64_dmiss(uint64_t address, uint64_t context) "DMISS at
