From patchwork Thu May 17 02:28:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yang Z" X-Patchwork-Id: 159799 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CF1FFB6FBA for ; Thu, 17 May 2012 12:29:25 +1000 (EST) Received: from localhost ([::1]:44293 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUqSx-00049l-M2 for incoming@patchwork.ozlabs.org; Wed, 16 May 2012 22:29:23 -0400 Received: from eggs.gnu.org ([208.118.235.92]:47716) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUqSi-00042Q-5R for qemu-devel@nongnu.org; Wed, 16 May 2012 22:29:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SUqSf-0007gK-Ge for qemu-devel@nongnu.org; Wed, 16 May 2012 22:29:07 -0400 Received: from mga14.intel.com ([143.182.124.37]:62544) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SUqSf-0007fy-AF for qemu-devel@nongnu.org; Wed, 16 May 2012 22:29:05 -0400 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga102.ch.intel.com with ESMTP; 16 May 2012 19:29:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.71,315,1320652800"; d="scan'208";a="144183502" Received: from azsmsx601.amr.corp.intel.com ([10.2.121.193]) by azsmga001.ch.intel.com with ESMTP; 16 May 2012 19:29:02 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by azsmsx601.amr.corp.intel.com (10.2.121.193) with Microsoft SMTP Server (TLS) id 8.2.255.0; Wed, 16 May 2012 19:29:02 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.6]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.90]) with mapi id 14.01.0355.002; Thu, 17 May 2012 10:28:44 +0800 From: "Zhang, Yang Z" To: "'qemu-devel@nongnu.org'" Thread-Topic: [PATCH v6 1/7] RTC: Remove the logic to update time format when DM bit changed Thread-Index: Ac0z1Men7/5RR6QdT76cqGRMmGVk8Q== Date: Thu, 17 May 2012 02:28:44 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 143.182.124.37 Cc: 'Paolo Bonzini' , "'aliguori@us.ibm.com'" , "'qemu-devel@nongnu.org'" Subject: [Qemu-devel] [PATCH v6 1/7] RTC: Remove the logic to update time format when DM bit changed X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Change DM(date mode) and 24/12 control bit doesn't affect the internal registers. It only indicates what format is using for those registers. Signed-off-by: Yang Zhang --- hw/mc146818rtc.c | 10 +--------- 1 files changed, 1 insertions(+), 9 deletions(-) -- 1.7.1 diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 9c64e0a..1ccfb50 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -220,15 +220,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) rtc_set_time(s); } } - if (((s->cmos_data[RTC_REG_B] ^ data) & (REG_B_DM | REG_B_24H)) && - !(data & REG_B_SET)) { - /* If the time format has changed and not in set mode, - update the registers immediately. */ - s->cmos_data[RTC_REG_B] = data; - rtc_copy_date(s); - } else { - s->cmos_data[RTC_REG_B] = data; - } + s->cmos_data[RTC_REG_B] = data; rtc_timer_update(s, qemu_get_clock_ns(rtc_clock)); break; case RTC_REG_C: