From patchwork Mon Apr 12 23:12:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 50005 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 646CBB7080 for ; Tue, 13 Apr 2010 09:41:29 +1000 (EST) Received: from localhost ([127.0.0.1]:38452 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O1TDl-0004Q9-Rk for incoming@patchwork.ozlabs.org; Mon, 12 Apr 2010 19:39:13 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1O1T1t-0000rN-C1 for qemu-devel@nongnu.org; Mon, 12 Apr 2010 19:26:57 -0400 Received: from [140.186.70.92] (port=54810 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1O1T1m-0000nO-GP for qemu-devel@nongnu.org; Mon, 12 Apr 2010 19:26:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1O1T1e-0007EQ-NX for qemu-devel@nongnu.org; Mon, 12 Apr 2010 19:26:50 -0400 Received: from are.twiddle.net ([75.149.56.221]:42301) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1O1T1e-0007Dg-Cw for qemu-devel@nongnu.org; Mon, 12 Apr 2010 19:26:42 -0400 Received: by are.twiddle.net (Postfix, from userid 5000) id 3ABA9C65; Mon, 12 Apr 2010 16:26:40 -0700 (PDT) Message-Id: <9f87c5b26aedf8bab25e34563d44dbaa3a7e45e1.1271114639.git.rth@twiddle.net> In-Reply-To: References: From: Richard Henderson Date: Mon, 12 Apr 2010 16:12:20 -0700 To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 01/10] target-alpha: Implement cpys{, n, e} inline. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/helper.h | 4 -- target-alpha/op_helper.c | 18 ---------- target-alpha/translate.c | 79 +++++++++++++++++++++++++++++++++++++++++++-- 3 files changed, 75 insertions(+), 26 deletions(-) diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 6072a26..73413f2 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -77,10 +77,6 @@ DEF_HELPER_FLAGS_2(cmpgeq, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) DEF_HELPER_FLAGS_2(cmpgle, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) DEF_HELPER_FLAGS_2(cmpglt, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) -DEF_HELPER_FLAGS_2(cpys, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) -DEF_HELPER_FLAGS_2(cpysn, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) -DEF_HELPER_FLAGS_2(cpyse, TCG_CALL_CONST | TCG_CALL_PURE, i64, i64, i64) - DEF_HELPER_FLAGS_1(cvtts, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvtst, TCG_CALL_CONST, i64, i64) DEF_HELPER_FLAGS_1(cvtqs, TCG_CALL_CONST, i64, i64) diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index dd1af84..ded71f6 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -921,24 +921,6 @@ uint64_t helper_sqrtt (uint64_t a) return float64_to_t(fr); } - -/* Sign copy */ -uint64_t helper_cpys(uint64_t a, uint64_t b) -{ - return (a & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); -} - -uint64_t helper_cpysn(uint64_t a, uint64_t b) -{ - return ((~a) & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); -} - -uint64_t helper_cpyse(uint64_t a, uint64_t b) -{ - return (a & 0xFFF0000000000000ULL) | (b & ~0xFFF0000000000000ULL); -} - - /* Comparisons */ uint64_t helper_cmptun (uint64_t a, uint64_t b) { diff --git a/target-alpha/translate.c b/target-alpha/translate.c index d903800..817194e 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -774,6 +774,81 @@ static inline void glue(gen_f, name)(DisasContext *ctx, \ IEEE_INTCVT(cvtqs) IEEE_INTCVT(cvtqt) +static void gen_cpys_internal(int ra, int rb, int rc, int inv_a, uint64_t mask) +{ + TCGv va, vb, vmask; + int za = 0, zb = 0; + + if (unlikely(rc == 31)) { + return; + } + + vmask = tcg_const_i64(mask); + + TCGV_UNUSED_I64(va); + if (ra == 31) { + if (inv_a) { + va = vmask; + } else { + za = 1; + } + } else { + va = tcg_temp_new_i64(); + tcg_gen_mov_i64(va, cpu_fir[ra]); + if (inv_a) { + tcg_gen_andc_i64(va, vmask, va); + } else { + tcg_gen_and_i64(va, va, vmask); + } + } + + TCGV_UNUSED_I64(vb); + if (rb == 31) { + zb = 1; + } else { + vb = tcg_temp_new_i64(); + tcg_gen_andc_i64(vb, cpu_fir[rb], vmask); + } + + switch (za << 1 | zb) { + case 0 | 0: + tcg_gen_or_i64(cpu_fir[rc], va, vb); + break; + case 0 | 1: + tcg_gen_mov_i64(cpu_fir[rc], va); + break; + case 2 | 0: + tcg_gen_mov_i64(cpu_fir[rc], vb); + break; + case 2 | 1: + tcg_gen_movi_i64(cpu_fir[rc], 0); + break; + } + + tcg_temp_free(vmask); + if (ra != 31) { + tcg_temp_free(va); + } + if (rb != 31) { + tcg_temp_free(vb); + } +} + +static inline void gen_fcpys(int ra, int rb, int rc) +{ + gen_cpys_internal(ra, rb, rc, 0, 0x8000000000000000ULL); +} + +static inline void gen_fcpysn(int ra, int rb, int rc) +{ + gen_cpys_internal(ra, rb, rc, 1, 0x8000000000000000ULL); +} + +static inline void gen_fcpyse(int ra, int rb, int rc) +{ + gen_cpys_internal(ra, rb, rc, 0, 0xFFF0000000000000ULL); +} + #define FARITH3(name) \ static inline void glue(gen_f, name)(int ra, int rb, int rc) \ { \ @@ -802,10 +877,6 @@ static inline void glue(gen_f, name)(int ra, int rb, int rc) \ tcg_temp_free(vb); \ } \ } -/* ??? Ought to expand these inline; simple masking operations. */ -FARITH3(cpys) -FARITH3(cpysn) -FARITH3(cpyse) /* ??? VAX instruction qualifiers ignored. */ FARITH3(addf)