From patchwork Sat Dec 3 11:17:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 129056 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 7CAE5B6F67 for ; Sat, 3 Dec 2011 22:19:25 +1100 (EST) Received: from localhost ([::1]:55868 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RWnck-000551-J3 for incoming@patchwork.ozlabs.org; Sat, 03 Dec 2011 06:19:18 -0500 Received: from eggs.gnu.org ([140.186.70.92]:56236) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RWnbU-0002LR-6e for qemu-devel@nongnu.org; Sat, 03 Dec 2011 06:18:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RWnbN-0002fA-BT for qemu-devel@nongnu.org; Sat, 03 Dec 2011 06:18:00 -0500 Received: from fmmailgate01.web.de ([217.72.192.221]:50214) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RWnbM-0002eR-PF for qemu-devel@nongnu.org; Sat, 03 Dec 2011 06:17:53 -0500 Received: from moweb001.kundenserver.de (moweb001.kundenserver.de [172.19.20.114]) by fmmailgate01.web.de (Postfix) with ESMTP id 1FBA81A4260EF for ; Sat, 3 Dec 2011 12:17:52 +0100 (CET) Received: from localhost.localdomain ([88.64.12.252]) by smtp.web.de (mrweb002) with ESMTPA (Nemesis) id 0MIvJx-1RUsis2Gmv-002ZQu; Sat, 03 Dec 2011 12:17:51 +0100 From: Jan Kiszka To: Avi Kivity , Marcelo Tosatti Date: Sat, 3 Dec 2011 12:17:34 +0100 Message-Id: <96c50e75b7c9c3a875ea3ce454aaea131c21f9cf.1322910904.git.jan.kiszka@web.de> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-Provags-ID: V02:K0:o2UBcyywVLbNIEXLPgC764it6im/9QR7CZaqM54qjCc E0IC/F33+6kP3buS8aA8zXcgJL5zEXgMfTBCGVS/YZhAk9twxR 4FYe6gArNUV6YwQFTRhj7YDXbKecP1nGZfXXM7yCQq3nHh9CtA tAFBzZqrJzcBJhmb8rVNZOBXqhrmWgRdnVKwCz4w3CI2O/zSew 9QZU95w2Eni8YllZkSiTw== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 217.72.192.221 Cc: Blue Swirl , Anthony Liguori , qemu-devel , kvm@vger.kernel.org, "Michael S. Tsirkin" Subject: [Qemu-devel] [RFC][PATCH 09/16] ioapic: Factor out core for KVM reuse X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Jan Kiszka KVM will share the IOAPICState, the vmstate, the reset logic and certain init parts with the user space model. Signed-off-by: Jan Kiszka --- Makefile.target | 2 +- hw/ioapic.c | 108 ++++--------------------------------------------- hw/ioapic_common.c | 89 +++++++++++++++++++++++++++++++++++++++++ hw/ioapic_internal.h | 93 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 192 insertions(+), 100 deletions(-) create mode 100644 hw/ioapic_common.c create mode 100644 hw/ioapic_internal.h diff --git a/Makefile.target b/Makefile.target index 7bb6b13..4cd3c0e 100644 --- a/Makefile.target +++ b/Makefile.target @@ -226,7 +226,7 @@ obj-$(CONFIG_IVSHMEM) += ivshmem.o # Hardware support obj-i386-y += vga.o obj-i386-y += mc146818rtc.o pc.o -obj-i386-y += cirrus_vga.o sga.o apic_common.o apic.o ioapic.o piix_pci.o +obj-i386-y += cirrus_vga.o sga.o apic_common.o apic.o ioapic_common.o ioapic.o piix_pci.o obj-i386-y += vmport.o obj-i386-y += device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o obj-i386-y += debugcon.o multiboot.o diff --git a/hw/ioapic.c b/hw/ioapic.c index eb75766..8876d5d 100644 --- a/hw/ioapic.c +++ b/hw/ioapic.c @@ -24,9 +24,7 @@ #include "pc.h" #include "apic.h" #include "ioapic.h" -#include "qemu-timer.h" -#include "host-utils.h" -#include "sysbus.h" +#include "ioapic_internal.h" //#define DEBUG_IOAPIC @@ -37,62 +35,6 @@ #define DPRINTF(fmt, ...) #endif -#define MAX_IOAPICS 1 - -#define IOAPIC_VERSION 0x11 - -#define IOAPIC_LVT_DEST_SHIFT 56 -#define IOAPIC_LVT_MASKED_SHIFT 16 -#define IOAPIC_LVT_TRIGGER_MODE_SHIFT 15 -#define IOAPIC_LVT_REMOTE_IRR_SHIFT 14 -#define IOAPIC_LVT_POLARITY_SHIFT 13 -#define IOAPIC_LVT_DELIV_STATUS_SHIFT 12 -#define IOAPIC_LVT_DEST_MODE_SHIFT 11 -#define IOAPIC_LVT_DELIV_MODE_SHIFT 8 - -#define IOAPIC_LVT_MASKED (1 << IOAPIC_LVT_MASKED_SHIFT) -#define IOAPIC_LVT_REMOTE_IRR (1 << IOAPIC_LVT_REMOTE_IRR_SHIFT) - -#define IOAPIC_TRIGGER_EDGE 0 -#define IOAPIC_TRIGGER_LEVEL 1 - -/*io{apic,sapic} delivery mode*/ -#define IOAPIC_DM_FIXED 0x0 -#define IOAPIC_DM_LOWEST_PRIORITY 0x1 -#define IOAPIC_DM_PMI 0x2 -#define IOAPIC_DM_NMI 0x4 -#define IOAPIC_DM_INIT 0x5 -#define IOAPIC_DM_SIPI 0x6 -#define IOAPIC_DM_EXTINT 0x7 -#define IOAPIC_DM_MASK 0x7 - -#define IOAPIC_VECTOR_MASK 0xff - -#define IOAPIC_IOREGSEL 0x00 -#define IOAPIC_IOWIN 0x10 - -#define IOAPIC_REG_ID 0x00 -#define IOAPIC_REG_VER 0x01 -#define IOAPIC_REG_ARB 0x02 -#define IOAPIC_REG_REDTBL_BASE 0x10 -#define IOAPIC_ID 0x00 - -#define IOAPIC_ID_SHIFT 24 -#define IOAPIC_ID_MASK 0xf - -#define IOAPIC_VER_ENTRIES_SHIFT 16 - -typedef struct IOAPICState IOAPICState; - -struct IOAPICState { - SysBusDevice busdev; - MemoryRegion io_memory; - uint8_t id; - uint8_t ioregsel; - uint32_t irr; - uint64_t ioredtbl[IOAPIC_NUM_PINS]; -}; - static IOAPICState *ioapics[MAX_IOAPICS]; static void ioapic_service(IOAPICState *s) @@ -278,44 +220,11 @@ ioapic_mem_write(void *opaque, target_phys_addr_t addr, uint64_t val, } } -static int ioapic_post_load(void *opaque, int version_id) -{ - IOAPICState *s = opaque; - - if (version_id == 1) { - /* set sane value */ - s->irr = 0; - } - return 0; -} - -static const VMStateDescription vmstate_ioapic = { - .name = "ioapic", - .version_id = 3, - .post_load = ioapic_post_load, - .minimum_version_id = 1, - .minimum_version_id_old = 1, - .fields = (VMStateField[]) { - VMSTATE_UINT8(id, IOAPICState), - VMSTATE_UINT8(ioregsel, IOAPICState), - VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */ - VMSTATE_UINT32_V(irr, IOAPICState, 2), - VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS), - VMSTATE_END_OF_LIST() - } -}; - static void ioapic_reset(DeviceState *d) { IOAPICState *s = DO_UPCAST(IOAPICState, busdev.qdev, d); - int i; - s->id = 0; - s->ioregsel = 0; - s->irr = 0; - for (i = 0; i < IOAPIC_NUM_PINS; i++) { - s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT; - } + ioapic_reset_internal(s); } static const MemoryRegionOps ioapic_io_ops = { @@ -327,18 +236,19 @@ static const MemoryRegionOps ioapic_io_ops = { static int ioapic_init1(SysBusDevice *dev) { IOAPICState *s = FROM_SYSBUS(IOAPICState, dev); - static int ioapic_no; + int ioapic_no; - if (ioapic_no >= MAX_IOAPICS) { + memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000); + + ioapic_no = ioapic_init_common(s); + if (ioapic_no < 0) { + memory_region_destroy(&s->io_memory); return -1; } - memory_region_init_io(&s->io_memory, &ioapic_io_ops, s, "ioapic", 0x1000); - sysbus_init_mmio_region(dev, &s->io_memory); - qdev_init_gpio_in(&dev->qdev, ioapic_set_irq, IOAPIC_NUM_PINS); - ioapics[ioapic_no++] = s; + ioapics[ioapic_no] = s; return 0; } diff --git a/hw/ioapic_common.c b/hw/ioapic_common.c new file mode 100644 index 0000000..7958093 --- /dev/null +++ b/hw/ioapic_common.c @@ -0,0 +1,89 @@ +/* + * IOAPIC emulation logic - common bits of emulated and KVM kernel model + * + * Copyright (c) 2004-2005 Fabrice Bellard + * Copyright (c) 2009 Xiantao Zhang, Intel + * Copyright (c) 2011 Jan Kiszka, Siemens AG + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "ioapic.h" +#include "ioapic_internal.h" +#include "sysbus.h" + +void ioapic_reset_internal(IOAPICState *s) +{ + int i; + + s->id = 0; + s->ioregsel = 0; + s->irr = 0; + for (i = 0; i < IOAPIC_NUM_PINS; i++) { + s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT; + } +} + +static void ioapic_dispatch_pre_save(void *opaque) +{ + IOAPICState *s = opaque; + + if (s->pre_save) { + s->pre_save(s); + } +} + +static int ioapic_post_load(void *opaque, int version_id) +{ + IOAPICState *s = opaque; + + if (version_id == 1) { + /* set sane value */ + s->irr = 0; + } + if (s->post_load) { + s->post_load(s); + } + return 0; +} + +const VMStateDescription vmstate_ioapic = { + .name = "ioapic", + .version_id = 3, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .pre_save = ioapic_dispatch_pre_save, + .post_load = ioapic_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINT8(id, IOAPICState), + VMSTATE_UINT8(ioregsel, IOAPICState), + VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */ + VMSTATE_UINT32_V(irr, IOAPICState, 2), + VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS), + VMSTATE_END_OF_LIST() + } +}; + +int ioapic_init_common(IOAPICState *s) +{ + static int ioapic_no; + + if (ioapic_no >= MAX_IOAPICS) { + return -1; + } + + sysbus_init_mmio_region(&s->busdev, &s->io_memory); + + return ioapic_no++; +} diff --git a/hw/ioapic_internal.h b/hw/ioapic_internal.h new file mode 100644 index 0000000..bda3608 --- /dev/null +++ b/hw/ioapic_internal.h @@ -0,0 +1,93 @@ +/* + * IOAPIC emulation logic - internal interfaces + * + * Copyright (c) 2004-2005 Fabrice Bellard + * Copyright (c) 2009 Xiantao Zhang, Intel + * Copyright (c) 2011 Jan Kiszka, Siemens AG + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef QEMU_IOAPIC_INTERNAL_H +#define QEMU_IOAPIC_INTERNAL_H + +#include "hw.h" +#include "memory.h" +#include "sysbus.h" + +#define MAX_IOAPICS 1 + +#define IOAPIC_VERSION 0x11 + +#define IOAPIC_LVT_DEST_SHIFT 56 +#define IOAPIC_LVT_MASKED_SHIFT 16 +#define IOAPIC_LVT_TRIGGER_MODE_SHIFT 15 +#define IOAPIC_LVT_REMOTE_IRR_SHIFT 14 +#define IOAPIC_LVT_POLARITY_SHIFT 13 +#define IOAPIC_LVT_DELIV_STATUS_SHIFT 12 +#define IOAPIC_LVT_DEST_MODE_SHIFT 11 +#define IOAPIC_LVT_DELIV_MODE_SHIFT 8 + +#define IOAPIC_LVT_MASKED (1 << IOAPIC_LVT_MASKED_SHIFT) +#define IOAPIC_LVT_REMOTE_IRR (1 << IOAPIC_LVT_REMOTE_IRR_SHIFT) + +#define IOAPIC_TRIGGER_EDGE 0 +#define IOAPIC_TRIGGER_LEVEL 1 + +/*io{apic,sapic} delivery mode*/ +#define IOAPIC_DM_FIXED 0x0 +#define IOAPIC_DM_LOWEST_PRIORITY 0x1 +#define IOAPIC_DM_PMI 0x2 +#define IOAPIC_DM_NMI 0x4 +#define IOAPIC_DM_INIT 0x5 +#define IOAPIC_DM_SIPI 0x6 +#define IOAPIC_DM_EXTINT 0x7 +#define IOAPIC_DM_MASK 0x7 + +#define IOAPIC_VECTOR_MASK 0xff + +#define IOAPIC_IOREGSEL 0x00 +#define IOAPIC_IOWIN 0x10 + +#define IOAPIC_REG_ID 0x00 +#define IOAPIC_REG_VER 0x01 +#define IOAPIC_REG_ARB 0x02 +#define IOAPIC_REG_REDTBL_BASE 0x10 +#define IOAPIC_ID 0x00 + +#define IOAPIC_ID_SHIFT 24 +#define IOAPIC_ID_MASK 0xf + +#define IOAPIC_VER_ENTRIES_SHIFT 16 + +typedef struct IOAPICState IOAPICState; + +struct IOAPICState { + SysBusDevice busdev; + MemoryRegion io_memory; + uint8_t id; + uint8_t ioregsel; + uint32_t irr; + uint64_t ioredtbl[IOAPIC_NUM_PINS]; + + void (*pre_save)(IOAPICState *s); + void (*post_load)(IOAPICState *s); +}; + +extern const VMStateDescription vmstate_ioapic; + +int ioapic_init_common(IOAPICState *s); +void ioapic_reset_internal(IOAPICState *s); + +#endif /* !QEMU_IOAPIC_INTERNAL_H */