@@ -361,7 +361,7 @@ static void spi_write(void *opaque, hwaddr addr,
static const MemoryRegionOps spi_ops = {
.read = spi_read,
.write = spi_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.valid = {
.min_access_size = 1,
.max_access_size = 4
@@ -228,7 +228,7 @@ static void pl022_reset(DeviceState *dev)
static const MemoryRegionOps pl022_ops = {
.read = pl022_read,
.write = pl022_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static int pl022_post_load(void *opaque, int version_id)
@@ -167,7 +167,7 @@ static void stm32f2xx_spi_write(void *opaque, hwaddr addr,
static const MemoryRegionOps stm32f2xx_spi_ops = {
.read = stm32f2xx_spi_read,
.write = stm32f2xx_spi_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
};
static const VMStateDescription vmstate_stm32f2xx_spi = {
@@ -1240,7 +1240,7 @@ static MemTxResult lqspi_write(void *opaque, hwaddr offset, uint64_t value,
static const MemoryRegionOps lqspi_ops = {
.read_with_attrs = lqspi_read,
.write_with_attrs = lqspi_write,
- .endianness = DEVICE_NATIVE_ENDIAN,
+ .endianness = DEVICE_LITTLE_ENDIAN,
.impl = {
.min_access_size = 4,
.max_access_size = 4,
For each device declared with DEVICE_NATIVE_ENDIAN, find the set of targets from the set of target/hw/*/device.o. If the set of targets are all little or all big endian, re-declare as DEVICE_LITTLE_ENDIAN or DEVICE_BIG_ENDIAN respectively. Then, on inspection: - if not used, re-declare as DEVICE_HOST_ENDIAN. - if max/min size=1, re-declare as DEVICE_HOST_ENDIAN. - if just a bit bucket, re-declare as DEVICE_HOST_ENDIAN - if PCI, re-declare as DEVICE_LITTLE_ENDIAN. - if for {ARM|unicore32} only, re-declare as DEVICE_LITTLE_ENDIAN. - if for SPARC only, re-declare as DEVICE_BIG_ENDIAN. Signed-off-by: Tony Nguyen <tony.nguyen@bt.com> --- hw/ssi/mss-spi.c | 2 +- hw/ssi/pl022.c | 2 +- hw/ssi/stm32f2xx_spi.c | 2 +- hw/ssi/xilinx_spips.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)