@@ -112,7 +112,7 @@ static void via_ide_set_irq(void *opaque, int n, int level)
d->config[0x70 + n * 8] &= ~0x80;
}
- via_isa_set_irq(pci_get_function_0(d), 14 + n, level);
+ via_isa_set_irq(d, VIA_IRQ_IDE0 + n, level);
}
static void via_ide_reset(DeviceState *dev)
@@ -549,6 +549,7 @@ struct ViaISAState {
PCIDevice dev;
qemu_irq cpu_intr;
qemu_irq *isa_irqs;
+ uint16_t isa_irq_state[ISA_NUM_IRQS];
ViaSuperIOState via_sio;
RTCState rtc;
PCIIDEState ide;
@@ -592,10 +593,43 @@ static const TypeInfo via_isa_info = {
},
};
-void via_isa_set_irq(PCIDevice *d, int n, int level)
+void via_isa_set_irq(PCIDevice *d, ViaISAIRQSourceBit n, int level)
{
- ViaISAState *s = VIA_ISA(d);
- qemu_set_irq(s->isa_irqs[n], level);
+ ViaISAState *s = VIA_ISA(pci_get_function_0(d));
+ uint8_t isa_irq = 0, max_irq = 15;
+
+ if (n == VIA_IRQ_USB0 && d == PCI_DEVICE(&s->uhci[1])) {
+ n++;
+ }
+ switch (n) {
+ case VIA_IRQ_IDE0:
+ isa_irq = 14;
+ break;
+ case VIA_IRQ_IDE1:
+ isa_irq = 15;
+ break;
+ case VIA_IRQ_USB0:
+ case VIA_IRQ_USB1:
+ max_irq = 14;
+ isa_irq = d->config[PCI_INTERRUPT_LINE];
+ break;
+ }
+
+ if (unlikely(isa_irq > max_irq || isa_irq == 2)) {
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing %d for %d",
+ isa_irq, n);
+ return;
+ }
+ if (!isa_irq) {
+ return;
+ }
+
+ if (level) {
+ s->isa_irq_state[isa_irq] |= BIT(n);
+ } else {
+ s->isa_irq_state[isa_irq] &= ~BIT(n);
+ }
+ qemu_set_irq(s->isa_irqs[isa_irq], !!s->isa_irq_state[isa_irq]);
}
static void via_isa_request_i8259_irq(void *opaque, int irq, int level)
@@ -6,10 +6,7 @@
static void uhci_isa_set_irq(void *opaque, int irq_num, int level)
{
UHCIState *s = opaque;
- uint8_t irq = pci_get_byte(s->dev.config + PCI_INTERRUPT_LINE);
- if (irq > 0 && irq < 15) {
- via_isa_set_irq(pci_get_function_0(&s->dev), irq, level);
- }
+ via_isa_set_irq(&s->dev, VIA_IRQ_USB0, level);
}
static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp)
@@ -9,6 +9,13 @@
#define TYPE_VIA_IDE "via-ide"
#define TYPE_VIA_MC97 "via-mc97"
-void via_isa_set_irq(PCIDevice *d, int n, int level);
+typedef enum {
+ VIA_IRQ_IDE0 = 0,
+ VIA_IRQ_IDE1 = 1,
+ VIA_IRQ_USB0 = 2,
+ VIA_IRQ_USB1 = 3,
+} ViaISAIRQSourceBit;
+
+void via_isa_set_irq(PCIDevice *d, ViaISAIRQSourceBit n, int level);
#endif
The VIA intergrated south bridge chips combine several functions and allow routing their interrupts to any of the ISA IRQs (also allowing multiple components to share the same ISA IRQ, e.g. pegasos2 firmware configures USB, sound and PCI to use IRQ 9). Currently components call via_isa_set_irq() to directly set the ISA IRQ they are mapped to. Change this that instead of an ISA IRQ number via_isa_set_irq() takes interrupt source and the component that wants to change the IRQ and keeps track of interrupt status of each source separately and does the mapping to ISA IRQ within the ISA bridge to allow different sources to control the same ISA IRQ lines. This patch may not handle cases when the ISA IRQ is also controlled by devices directly, not going through via_isa_set_irq() such as serial, parallel or keyboard but these IRQs being conventionally fixed are not likely for guests to change or share with other devices so this does not cause a problem in practice and limits the complexity of this change to what is needed for the guests we care about. This patch is preliminary for fixing PCI device interrupts on pegasos2. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/ide/via.c | 2 +- hw/isa/vt82c686.c | 40 +++++++++++++++++++++++++++++++++++--- hw/usb/vt82c686-uhci-pci.c | 5 +---- include/hw/isa/vt82c686.h | 9 ++++++++- 4 files changed, 47 insertions(+), 9 deletions(-)