From patchwork Wed Apr 29 08:48:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: chenfan X-Patchwork-Id: 465947 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4E0671402BD for ; Wed, 29 Apr 2015 18:55:42 +1000 (AEST) Received: from localhost ([::1]:37792 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnNmO-0007bq-AT for incoming@patchwork.ozlabs.org; Wed, 29 Apr 2015 04:55:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35994) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnNgb-0003hC-Rz for qemu-devel@nongnu.org; Wed, 29 Apr 2015 04:49:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YnNga-0002xW-Sq for qemu-devel@nongnu.org; Wed, 29 Apr 2015 04:49:41 -0400 Received: from [59.151.112.132] (port=1065 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YnNga-0002jM-I4 for qemu-devel@nongnu.org; Wed, 29 Apr 2015 04:49:40 -0400 X-IronPort-AV: E=Sophos;i="5.04,848,1406563200"; d="scan'208";a="91413647" Received: from localhost (HELO edo.cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 29 Apr 2015 16:45:47 +0800 Received: from G08CNEXCHPEKD02.g08.fujitsu.local (localhost.localdomain [127.0.0.1]) by edo.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id t3T8mN43007380; Wed, 29 Apr 2015 16:48:23 +0800 Received: from G08FNSTD131468.g08.fujitsu.local (10.167.226.78) by G08CNEXCHPEKD02.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.181.6; Wed, 29 Apr 2015 16:49:43 +0800 From: Chen Fan To: Date: Wed, 29 Apr 2015 16:48:37 +0800 Message-ID: <8b386436fab653c05b58b2ca089b689ed8c66fa9.1430297161.git.chen.fan.fnst@cn.fujitsu.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.167.226.78] X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Cc: izumi.taku@jp.fujitsu.com, alex.williamson@redhat.com Subject: [Qemu-devel] [PATCH RFC v6 09/11] qdev: add bus reset_notifiers callbacks for host bus reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org when recovery AER, we always need to reset the host bus to recovery the devices under the bus, so add pci bus callbacks to reset host bus when vfio support AER. Signed-off-by: Chen Fan --- hw/pci/pci.c | 6 ++++++ hw/pci/pci_bridge.c | 3 +++ include/hw/pci/pci.h | 2 ++ include/hw/pci/pci_bus.h | 2 ++ 4 files changed, 13 insertions(+) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index b3d5100..427d4d6 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -74,11 +74,17 @@ static const VMStateDescription vmstate_pcibus = { } }; +void pci_bus_add_reset_notifier(PCIBus *bus, Notifier *notify) +{ + notifier_list_add(&bus->reset_notifiers, notify); +} + static void pci_bus_realize(BusState *qbus, Error **errp) { PCIBus *bus = PCI_BUS(qbus); vmstate_register(NULL, -1, &vmstate_pcibus, bus); + notifier_list_init(&bus->reset_notifiers); } static void pci_bus_unrealize(BusState *qbus, Error **errp) diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 40c97b1..24fee8b 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -267,6 +267,9 @@ void pci_bridge_write_config(PCIDevice *d, newctl = pci_get_word(d->config + PCI_BRIDGE_CONTROL); if (~oldctl & newctl & PCI_BRIDGE_CTL_BUS_RESET) { + /* do host secondary bus reset for passthrough devices */ + notifier_list_notify(&s->sec_bus.reset_notifiers, NULL); + /* Trigger hot reset on 0->1 transition. */ qbus_reset_all(&s->sec_bus.qbus); } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d4ffead..79ae725 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -7,6 +7,7 @@ #include "exec/memory.h" #include "sysemu/dma.h" #include "qapi/error.h" +#include "qemu/notify.h" /* PCI includes legacy ISA access. */ #include "hw/isa/isa.h" @@ -370,6 +371,7 @@ void pci_bus_fire_intx_routing_notifier(PCIBus *bus); void pci_device_set_intx_routing_notifier(PCIDevice *dev, PCIINTxRoutingNotifier notifier); void pci_device_reset(PCIDevice *dev); +void pci_bus_add_reset_notifier(PCIBus *bus, Notifier *notify); PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus, const char *default_model, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index fabaeee..3b551d7 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -29,6 +29,8 @@ struct PCIBus { Keep a count of the number of devices with raised IRQs. */ int nirq; int *irq_count; + + NotifierList reset_notifiers; }; typedef struct PCIBridgeWindows PCIBridgeWindows;