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[v4,4/8] i.MX: Fix FEC code for MDIO address selection

Message ID 850d6261de5867972265e8e0b70f2b80d6851a53.1463609668.git.jcd@tribudubois.net
State New
Headers show

Commit Message

Jean-Christophe DUBOIS May 18, 2016, 10:22 p.m. UTC
According to the FEC chapter of i.MX25 reference manual

When writing to MMFR register, the MDIO device and adress are selected by
bit 27 to 23 and bit 22 to 18 respectively. This is a total of 10 bits
that need to be used by the Phy chip/address decoding function.

This patch fixes the number of bits used from 9 to 10.

Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
---

Changes since v1:
 * Not present on v1
 
Changes since v2:
 * Not present on v2

Changes since v3:
 * Not present on v3

 hw/net/imx_fec.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
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Patch

diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index b3f5e4a..a649027 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -459,9 +459,9 @@  static void imx_fec_write(void *opaque, hwaddr addr,
         /* store the value */
         s->mmfr = value;
         if (extract32(value, 29, 1)) {
-            s->mmfr = do_phy_read(s, extract32(value, 18, 9));
+            s->mmfr = do_phy_read(s, extract32(value, 18, 10));
         } else {
-            do_phy_write(s, extract32(value, 18, 9), extract32(value, 0, 16));
+            do_phy_write(s, extract32(value, 18, 10), extract32(value, 0, 16));
         }
         /* raise the interrupt as the PHY operation is done */
         s->eir |= FEC_INT_MII;