From patchwork Wed Apr 4 18:21:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 150780 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C27FBB7000 for ; Thu, 5 Apr 2012 04:22:36 +1000 (EST) Received: from localhost ([::1]:43713 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFUql-0004MQ-Iq for incoming@patchwork.ozlabs.org; Wed, 04 Apr 2012 14:22:31 -0400 Received: from eggs.gnu.org ([208.118.235.92]:39937) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFUqN-0003me-9c for qemu-devel@nongnu.org; Wed, 04 Apr 2012 14:22:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SFUqJ-0007Ye-32 for qemu-devel@nongnu.org; Wed, 04 Apr 2012 14:22:05 -0400 Received: from smtp.citrix.com ([66.165.176.89]:56720) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SFUqI-0007Xc-Ul for qemu-devel@nongnu.org; Wed, 04 Apr 2012 14:22:03 -0400 X-IronPort-AV: E=Sophos;i="4.75,370,1330923600"; d="scan'208";a="23878599" Received: from ftlpmailmx02.citrite.net ([10.13.107.66]) by FTLPIPO01.CITRIX.COM with ESMTP/TLS/RC4-MD5; 04 Apr 2012 14:21:58 -0400 Received: from meteora.cam.xci-test.com (10.80.248.241) by smtprelay.citrix.com (10.13.107.66) with Microsoft SMTP Server id 8.3.213.0; Wed, 4 Apr 2012 14:21:58 -0400 From: Julien Grall To: qemu-devel@nongnu.org Date: Wed, 4 Apr 2012 19:21:10 +0100 Message-ID: <7a0947a4723e7fae0e35e6e008e6c94fdc100609.1333561077.git.julien.grall@citrix.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: References: MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 66.165.176.89 Cc: Julien Grall , julian.pidancet@citrix.com, avi@redhat.com, Stefano.Stabellini@eu.citrix.com Subject: [Qemu-devel] [PATCH V2 7/7] hw/apm.c: replace register_ioport* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch replaces all register_ioport* by a MemorySection. It permits to use the new Memory stuff like listener. Moreover, the PCI is added as an argument for apm_init, so we can register IO inside the pci IO address space. Signed-off-by: Julien Grall --- hw/acpi_piix4.c | 2 +- hw/apm.c | 24 +++++++++++++++++++----- hw/apm.h | 5 ++++- hw/vt82c686.c | 2 +- 4 files changed, 25 insertions(+), 8 deletions(-) diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index b9b195b..b0e7749 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -357,7 +357,7 @@ static int piix4_pm_initfn(PCIDevice *dev) pci_conf[0x40] = 0x01; /* PM io base read only bit */ /* APM */ - apm_init(&s->apm, apm_ctrl_changed, s); + apm_init(dev, &s->apm, apm_ctrl_changed, s); portio_list_init(&s->acpi_port_list, acpi_portio_list, s, "piix4-acpi"); portio_list_add(&s->acpi_port_list, pci_address_space_io(dev), diff --git a/hw/apm.c b/hw/apm.c index 2aead52..fe7bc21 100644 --- a/hw/apm.c +++ b/hw/apm.c @@ -22,6 +22,7 @@ #include "apm.h" #include "hw.h" +#include "pci.h" //#define DEBUG @@ -35,7 +36,8 @@ #define APM_CNT_IOPORT 0xb2 #define APM_STS_IOPORT 0xb3 -static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) +static void apm_ioport_writeb(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned size) { APMState *apm = opaque; addr &= 1; @@ -51,7 +53,8 @@ static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) } } -static uint32_t apm_ioport_readb(void *opaque, uint32_t addr) +static uint64_t apm_ioport_readb(void *opaque, target_phys_addr_t addr, + unsigned size) { APMState *apm = opaque; uint32_t val; @@ -78,12 +81,23 @@ const VMStateDescription vmstate_apm = { } }; -void apm_init(APMState *apm, apm_ctrl_changed_t callback, void *arg) +static const MemoryRegionOps apm_ops = { + .read = apm_ioport_readb, + .write = apm_ioport_writeb, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; + +void apm_init(PCIDevice *dev, APMState *apm, apm_ctrl_changed_t callback, + void *arg) { apm->callback = callback; apm->arg = arg; /* ioport 0xb2, 0xb3 */ - register_ioport_write(APM_CNT_IOPORT, 2, 1, apm_ioport_writeb, apm); - register_ioport_read(APM_CNT_IOPORT, 2, 1, apm_ioport_readb, apm); + memory_region_init_io(&apm->io, &apm_ops, apm, "apm-io", 2); + memory_region_add_subregion(pci_address_space_io(dev), APM_CNT_IOPORT, + &apm->io); } diff --git a/hw/apm.h b/hw/apm.h index f7c741e..5431b6d 100644 --- a/hw/apm.h +++ b/hw/apm.h @@ -4,6 +4,7 @@ #include #include "qemu-common.h" #include "hw.h" +#include "memory.h" typedef void (*apm_ctrl_changed_t)(uint32_t val, void *arg); @@ -13,9 +14,11 @@ typedef struct APMState { apm_ctrl_changed_t callback; void *arg; + MemoryRegion io; } APMState; -void apm_init(APMState *s, apm_ctrl_changed_t callback, void *arg); +void apm_init(PCIDevice *dev, APMState *s, apm_ctrl_changed_t callback, + void *arg); extern const VMStateDescription vmstate_apm; diff --git a/hw/vt82c686.c b/hw/vt82c686.c index 6fb7950..1994bc5 100644 --- a/hw/vt82c686.c +++ b/hw/vt82c686.c @@ -427,7 +427,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) register_ioport_write(s->smb_io_base, 0xf, 1, smb_ioport_writeb, &s->smb); register_ioport_read(s->smb_io_base, 0xf, 1, smb_ioport_readb, &s->smb); - apm_init(&s->apm, NULL, s); + apm_init(dev, &s->apm, NULL, s); acpi_pm_tmr_init(&s->ar, pm_tmr_timer); acpi_pm1_cnt_init(&s->ar);