Message ID | 6ec43c1bf0886d917fcd88d3751d72def5507db2.1575914822.git.alistair.francis@wdc.com |
---|---|
State | New |
Headers | show |
Series | Add RISC-V Hypervisor Extension v0.5 | expand |
On Mon, 09 Dec 2019 10:11:27 PST (-0800), Alistair Francis wrote: > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > target/riscv/csr.c | 24 ++++++++++++++++++++---- > 1 file changed, 20 insertions(+), 4 deletions(-) > > diff --git a/target/riscv/csr.c b/target/riscv/csr.c > index fc38c45a7e..54edfb280e 100644 > --- a/target/riscv/csr.c > +++ b/target/riscv/csr.c > @@ -244,8 +244,10 @@ static int read_timeh(CPURISCVState *env, int csrno, target_ulong *val) > #define S_MODE_INTERRUPTS (MIP_SSIP | MIP_STIP | MIP_SEIP) > #define VS_MODE_INTERRUPTS (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) > > -static const target_ulong delegable_ints = S_MODE_INTERRUPTS; > -static const target_ulong all_ints = M_MODE_INTERRUPTS | S_MODE_INTERRUPTS; > +static const target_ulong delegable_ints = S_MODE_INTERRUPTS | > + VS_MODE_INTERRUPTS; > +static const target_ulong all_ints = M_MODE_INTERRUPTS | S_MODE_INTERRUPTS | > + VS_MODE_INTERRUPTS; > static const target_ulong delegable_excps = > (1ULL << (RISCV_EXCP_INST_ADDR_MIS)) | > (1ULL << (RISCV_EXCP_INST_ACCESS_FAULT)) | > @@ -631,13 +633,27 @@ static int write_sstatus(CPURISCVState *env, int csrno, target_ulong val) > > static int read_sie(CPURISCVState *env, int csrno, target_ulong *val) > { > - *val = env->mie & env->mideleg; > + if (riscv_cpu_virt_enabled(env)) { > + /* Tell the guest the VS bits, shifted to the S bit locations */ > + *val = (env->mie & env->mideleg & VS_MODE_INTERRUPTS) >> 1; > + } else { > + *val = env->mie & env->mideleg; > + } > return 0; > } > > static int write_sie(CPURISCVState *env, int csrno, target_ulong val) > { > - target_ulong newval = (env->mie & ~env->mideleg) | (val & env->mideleg); > + target_ulong newval; > + > + if (riscv_cpu_virt_enabled(env)) { > + /* Shift the guests S bits to VS */ > + newval = (env->mie & ~VS_MODE_INTERRUPTS) | > + ((val << 1) & VS_MODE_INTERRUPTS); > + } else { > + newval = (env->mie & ~S_MODE_INTERRUPTS) | (val & S_MODE_INTERRUPTS); > + } > + > return write_mie(env, CSR_MIE, newval); > } Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
diff --git a/target/riscv/csr.c b/target/riscv/csr.c index fc38c45a7e..54edfb280e 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -244,8 +244,10 @@ static int read_timeh(CPURISCVState *env, int csrno, target_ulong *val) #define S_MODE_INTERRUPTS (MIP_SSIP | MIP_STIP | MIP_SEIP) #define VS_MODE_INTERRUPTS (MIP_VSSIP | MIP_VSTIP | MIP_VSEIP) -static const target_ulong delegable_ints = S_MODE_INTERRUPTS; -static const target_ulong all_ints = M_MODE_INTERRUPTS | S_MODE_INTERRUPTS; +static const target_ulong delegable_ints = S_MODE_INTERRUPTS | + VS_MODE_INTERRUPTS; +static const target_ulong all_ints = M_MODE_INTERRUPTS | S_MODE_INTERRUPTS | + VS_MODE_INTERRUPTS; static const target_ulong delegable_excps = (1ULL << (RISCV_EXCP_INST_ADDR_MIS)) | (1ULL << (RISCV_EXCP_INST_ACCESS_FAULT)) | @@ -631,13 +633,27 @@ static int write_sstatus(CPURISCVState *env, int csrno, target_ulong val) static int read_sie(CPURISCVState *env, int csrno, target_ulong *val) { - *val = env->mie & env->mideleg; + if (riscv_cpu_virt_enabled(env)) { + /* Tell the guest the VS bits, shifted to the S bit locations */ + *val = (env->mie & env->mideleg & VS_MODE_INTERRUPTS) >> 1; + } else { + *val = env->mie & env->mideleg; + } return 0; } static int write_sie(CPURISCVState *env, int csrno, target_ulong val) { - target_ulong newval = (env->mie & ~env->mideleg) | (val & env->mideleg); + target_ulong newval; + + if (riscv_cpu_virt_enabled(env)) { + /* Shift the guests S bits to VS */ + newval = (env->mie & ~VS_MODE_INTERRUPTS) | + ((val << 1) & VS_MODE_INTERRUPTS); + } else { + newval = (env->mie & ~S_MODE_INTERRUPTS) | (val & S_MODE_INTERRUPTS); + } + return write_mie(env, CSR_MIE, newval); }
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- target/riscv/csr.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-)