From patchwork Sun Apr 16 23:23:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stafford Horne X-Patchwork-Id: 751194 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w5nYV17Znz9s0g for ; Mon, 17 Apr 2017 09:25:02 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ieMbztEs"; dkim-atps=neutral Received: from localhost ([::1]:33910 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cztXP-0003jj-Gl for incoming@patchwork.ozlabs.org; Sun, 16 Apr 2017 19:24:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37886) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cztWb-0003iZ-2L for qemu-devel@nongnu.org; Sun, 16 Apr 2017 19:24:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cztWa-0007tF-4b for qemu-devel@nongnu.org; Sun, 16 Apr 2017 19:24:09 -0400 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:36847) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cztWZ-0007sn-Uy for qemu-devel@nongnu.org; Sun, 16 Apr 2017 19:24:08 -0400 Received: by mail-pg0-x241.google.com with SMTP id 34so21150970pgx.3 for ; Sun, 16 Apr 2017 16:24:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=dP8D5mXHfCmlZKkCceVV+mOKQHLFklS/BMRH3xOn8mI=; b=ieMbztEsLtKQxPsG2UCDKXmyR377A7+UisCB6PTvPb6u2XttRdJtSed3Jp+F6Aphrf 06l/0WTWW3d0tvtVXlqx7vo1nZAFi5y2vHV0zEZqMCfbv+G2MyedRft5lyBbgJQ20jOt R3P5dg5JuDZIr9DM64X5wKNMYBjDZVSoM0UCO9PmDQ37Xy+LV7JfyNU9tanLSeaWCl+b dM47ma2Z/Vn7fleFXh4fiaDuQeMi/BH9YUHFjHEkKIY6QopHYUmePDD+p3AgtH08DMLH 4KkaSjyXaGAkZgfTxUPY5xA/80L/q/ys7FggAh4vULzJ2XRDHVlb8E2EK7QvnDFPEBOU 9+aQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=dP8D5mXHfCmlZKkCceVV+mOKQHLFklS/BMRH3xOn8mI=; b=kYUPhmCetza5+t6STFV9vNzDIEo/hT6HXbiz1sQp5buKE479tpjx2NI0YcG8m5wIbU 6Qho6aKzOmo59FnaS771xmjtqZcHhasd5ldoSB/d6FvkqmWnhzdnEpN9YEcYWmYT/3Ae Fc1ksIkT1sQVD0Ledm1JdQKdeAor0ztAJlgLc1jVoPaaxZ9M0skQ/i4iZo5xZusVU4tK BoPI85O9CExsW8kL1gZ8VgxZAMhOteHs/KNRY1/1ung/AcynHKR8EO2BL+1bEP/OeiwT f4SMZqnX7VL7xfvM2eUvrJSgJogc4+RhBZVXFtZvPc4V0qadceAANlk7YUpr847ZNY9l P0SA== X-Gm-Message-State: AN3rC/6Z57vRfofPcdZGO4+h9pfcG4d7Rj3FFeydzC2G2AwXNP1yD/eS EDoJsft604VS+g== X-Received: by 10.84.193.129 with SMTP id f1mr12110728pld.97.1492385047202; Sun, 16 Apr 2017 16:24:07 -0700 (PDT) Received: from localhost (z24.124-44-184.ppp.wakwak.ne.jp. [124.44.184.24]) by smtp.gmail.com with ESMTPSA id y29sm14031373pfj.90.2017.04.16.16.24.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Apr 2017 16:24:06 -0700 (PDT) From: Stafford Horne To: qemu-devel@nongnu.org Date: Mon, 17 Apr 2017 08:23:50 +0900 Message-Id: <575d21dff52df4fa53d17e77728018453f82e8e5.1492384862.git.shorne@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH 1/7] target/openrisc: Fixes for memory debugging X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stafford Horne , openrisc@lists.librecores.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When debugging in gdb you might want to inspect instructions in mapped pages or in exception vectors like 0x800 etc. This was previously not possible in qemu since the *get_phys_page_debug() routine only looked into the data tlb. Change to fall back to look into instruction tlb and plain physical pages. Signed-off-by: Stafford Horne Reviewed-by: Richard Henderson --- target/openrisc/mmu.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c index 56b11d3..a6d7bcd 100644 --- a/target/openrisc/mmu.c +++ b/target/openrisc/mmu.c @@ -124,7 +124,7 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu, { int ret = TLBRET_MATCH; - if (rw == 2) { /* ITLB */ + if (rw == MMU_INST_FETCH) { /* ITLB */ *physical = 0; ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical, prot, address, rw); @@ -221,12 +221,27 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) OpenRISCCPU *cpu = OPENRISC_CPU(cs); hwaddr phys_addr; int prot; + int miss; - if (cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0)) { - return -1; + /* Check memory for any kind of address, since during debug the + gdb can ask for anything, check data tlb for address */ + miss = cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0); + + /* Check instruction tlb */ + if (miss) { + miss = cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, MMU_INST_FETCH); + } + + /* Last, fall back to a plain address */ + if (miss) { + miss = cpu_openrisc_get_phys_nommu(cpu, &phys_addr, &prot, addr, 0); } - return phys_addr; + if (miss) { + return -1; + } else { + return phys_addr; + } } void cpu_openrisc_mmu_init(OpenRISCCPU *cpu)