From patchwork Sat Jan 2 23:55:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 562119 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D0F0814076B for ; Sun, 3 Jan 2016 10:53:13 +1100 (AEDT) Received: from localhost ([::1]:40077 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aFVyx-0006j9-G9 for incoming@patchwork.ozlabs.org; Sat, 02 Jan 2016 18:53:11 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37975) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aFVyj-0006SK-W4 for qemu-devel@nongnu.org; Sat, 02 Jan 2016 18:52:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aFVyg-0007tq-Op for qemu-devel@nongnu.org; Sat, 02 Jan 2016 18:52:57 -0500 Received: from mail113-251.mail.alibaba.com ([205.204.113.251]:36524 helo=us-alimail-mta1.hst.scl.en.alidc.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aFVyg-0007th-2V for qemu-devel@nongnu.org; Sat, 02 Jan 2016 18:52:54 -0500 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07350352|-1; FP=0|0|0|0|0|-1|-1|-1; HT=e01l07396; MF=chengang@emindsoft.com.cn; NM=1; PH=DS; RN=6; RT=5; SR=0; TI=SMTPD_----4PYxYQ-_1451778756; Received: from ShengShiZhuChengdeMacBook-Pro.local(mailfrom:chengang@emindsoft.com.cn ip:223.72.67.13) by smtp.aliyun-inc.com(10.147.43.171); Sun, 03 Jan 2016 07:52:37 +0800 Message-ID: <56886387.6090403@emindsoft.com.cn> Date: Sun, 03 Jan 2016 07:55:51 +0800 From: Chen Gang User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.10; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: chengang@emindsoft.com.cn, peter.maydell@linaro.org, rth@twiddle.net, cmetcalf@ezchip.com References: <1451773519-10134-1-git-send-email-chengang@emindsoft.com.cn> <1451773519-10134-2-git-send-email-chengang@emindsoft.com.cn> In-Reply-To: <1451773519-10134-2-git-send-email-chengang@emindsoft.com.cn> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 205.204.113.251 Cc: qemu-devel@nongnu.org Subject: Re: [Qemu-devel] [PATCH v5 1/5] fpu: softfloat: Add normalize_roundpack_float32 function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org For sig == 0 case, the original implementation is incorrect (although it passes gcc testsuite), it needs to consider about sign for float_zero. The related fix diff for it is below. After patches v5 are finished reviewing, I shall merge the fix diff below to patch v6, next. Thanks. On 1/3/16 06:25, chengang@emindsoft.com.cn wrote: > From: Chen Gang > > It is based on (u)int32_to_float32 function to support float32 packing. > > Signed-off-by: Chen Gang > --- > fpu/softfloat.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++ > include/fpu/softfloat.h | 8 +++++++ > 2 files changed, 63 insertions(+) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index f1170fe..dba8566 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -7080,6 +7080,61 @@ float64 uint32_to_float64(uint32_t a, float_status *status) > return int64_to_float64(a, status); > } > > +/* > + * The mantissa contents the hide bit, e.g. exp: 0x9e with sig: 1 means 1.0f. > + * > + * It references from int32_to_float32() and uint32_to_float32() > + */ > +float32 normalize_roundpack_float32(flag sign, int_fast16_t exp, uint32_t sig, > + float_status *status) > +{ > + uint64_t absa = sig; > + int8_t scount; > + > + if (exp >= 0xff) { > + return packFloat32(sign, 0xFF, 0); > + } else if (exp <= 0) { > + shift32RightJamming(sig, 0 - exp, &sig); > + return packFloat32(sign, 0, sig); > + } > + > + if (sign) { > + if (sig & 0x7FFFFFFF) { > + return normalizeRoundAndPackFloat32(1, exp - 2, sig, status); > + } > + if (sig) { > + return packFloat32(1, exp, 0); > + } else { > + return float32_zero; > + } > + } > + > + if (!sig) { > + return float32_zero; > + } > + > + scount = countLeadingZeros64(absa) - 40; > + if (scount >= 0) { > + exp -= 7 + scount + 2; > + if (exp <= 0) { > + return packFloat32(0, 0, absa); > + } > + return packFloat32(0, exp, absa << scount); > + } > + > + scount += 7; > + exp -= scount + 2; > + if (exp <= 0) { > + return packFloat32(0, 0, absa); > + } > + if (scount < 0) { > + shift64RightJamming(absa, 0 - scount, &absa); > + } else { > + absa <<= scount; > + } > + return roundAndPackFloat32(0, exp, absa, status); > +} > + > uint32 float32_to_uint32(float32 a, float_status *status) > { > int64_t v; > diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h > index ded34eb..4995a15 100644 > --- a/include/fpu/softfloat.h > +++ b/include/fpu/softfloat.h > @@ -422,6 +422,14 @@ int float32_is_signaling_nan( float32 ); > float32 float32_maybe_silence_nan( float32 ); > float32 float32_scalbn(float32, int, float_status *status); > > +/* > + * The mantissa contents the hide bit, e.g. exp: 0x9e with sig: 1 means 1.0f. > + * > + * It references from int32_to_float32() and uint32_to_float32() > + */ > +float32 normalize_roundpack_float32(flag sign, int_fast16_t exp, uint32_t sig, > + float_status *status); > + > static inline float32 float32_abs(float32 a) > { > /* Note that abs does *not* handle NaN specially, nor does > diff --git a/fpu/softfloat.c b/fpu/softfloat.c index dba8566..5ad8bb5 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -7098,19 +7098,15 @@ float32 normalize_roundpack_float32(flag sign, int_fast16_t exp, uint32_t sig, return packFloat32(sign, 0, sig); } + if (!sig) { + return float32_set_sign(float32_zero, sign); + } + if (sign) { if (sig & 0x7FFFFFFF) { return normalizeRoundAndPackFloat32(1, exp - 2, sig, status); } - if (sig) { - return packFloat32(1, exp, 0); - } else { - return float32_zero; - } - } - - if (!sig) { - return float32_zero; + return packFloat32(1, exp, 0); } scount = countLeadingZeros64(absa) - 40;