From patchwork Tue Nov 4 09:12:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hu Tao X-Patchwork-Id: 406478 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 57F1E1400A6 for ; Tue, 4 Nov 2014 20:16:26 +1100 (AEDT) Received: from localhost ([::1]:39319 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlaDv-0007cY-9B for incoming@patchwork.ozlabs.org; Tue, 04 Nov 2014 04:16:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36400) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlaDJ-0006hv-1a for qemu-devel@nongnu.org; Tue, 04 Nov 2014 04:15:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XlaDE-00069N-4l for qemu-devel@nongnu.org; Tue, 04 Nov 2014 04:15:44 -0500 Received: from [59.151.112.132] (port=20479 helo=heian.cn.fujitsu.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlaDD-00068c-MG for qemu-devel@nongnu.org; Tue, 04 Nov 2014 04:15:40 -0500 X-IronPort-AV: E=Sophos;i="5.04,845,1406563200"; d="scan'208";a="42818303" Received: from localhost (HELO edo.cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 04 Nov 2014 17:12:25 +0800 Received: from G08CNEXCHPEKD03.g08.fujitsu.local (localhost.localdomain [127.0.0.1]) by edo.cn.fujitsu.com (8.14.3/8.13.1) with ESMTP id sA49FP0j021428; Tue, 4 Nov 2014 17:15:25 +0800 Received: from localhost.localdomain (10.167.226.102) by G08CNEXCHPEKD03.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.181.6; Tue, 4 Nov 2014 17:15:37 +0800 From: Hu Tao To: Date: Tue, 4 Nov 2014 17:12:14 +0800 Message-ID: <51f88e8c944034037eba3835ced2763880ac4c10.1415091929.git.hutao@cn.fujitsu.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.167.226.102] X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 59.151.112.132 Cc: "Michael S. Tsirkin" Subject: [Qemu-devel] [PATCH 3/5] pci: move initialization of pci's conf_addr and conf_data to common place X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org So that standard pci host device can share them. Signed-off-by: Hu Tao --- hw/pci-host/piix.c | 20 -------------------- hw/pci-host/q35.c | 7 ------- hw/pci/pci_host.c | 32 ++++++++++++++++++++++++++++++++ 3 files changed, 32 insertions(+), 27 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index eb92bde..683465c 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -256,14 +256,8 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { - PCIHostState *s = PCI_HOST_BRIDGE(obj); I440FXState *d = I440FX_PCI_HOST_BRIDGE(obj); - memory_region_init_io(&s->conf_mem, obj, &pci_host_conf_le_ops, s, - "pci-conf-idx", 4); - memory_region_init_io(&s->data_mem, obj, &pci_host_data_le_ops, s, - "pci-conf-data", 4); - object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "int", i440fx_pcihost_get_pci_hole_start, NULL, NULL, NULL, NULL); @@ -283,18 +277,6 @@ static void i440fx_pcihost_initfn(Object *obj) d->pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS; } -static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) -{ - PCIHostState *s = PCI_HOST_BRIDGE(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - - sysbus_add_io(sbd, PC_PCI_CONFIG_ADDR, &s->conf_mem); - sysbus_init_ioports(sbd, PC_PCI_CONFIG_ADDR, 4); - - sysbus_add_io(sbd, PC_PCI_CONFIG_DATA, &s->data_mem); - sysbus_init_ioports(sbd, PC_PCI_CONFIG_DATA, 4); -} - static int i440fx_initfn(PCIDevice *dev) { PCII440FXState *d = I440FX_PCI_DEVICE(dev); @@ -755,8 +737,6 @@ static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(klass); hc->root_bus_path = i440fx_pcihost_root_bus_path; - dc->realize = i440fx_pcihost_realize; - dc->fw_name = "pci"; dc->props = i440fx_props; } diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 9e66835..81eddd7 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -138,18 +138,11 @@ static void q35_host_class_init(ObjectClass *klass, void *data) dc->realize = q35_host_realize; dc->props = mch_props; set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); - dc->fw_name = "pci"; } static void q35_host_initfn(Object *obj) { Q35PCIHost *s = Q35_HOST_DEVICE(obj); - PCIHostState *phb = PCI_HOST_BRIDGE(obj); - - memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, - "pci-conf-idx", 4); - memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, - "pci-conf-data", 4); object_initialize(&s->mch, sizeof(s->mch), TYPE_MCH_PCI_DEVICE); object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL); diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index f2a69ea..406c747 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -176,12 +176,44 @@ const MemoryRegionOps pci_host_data_be_ops = { .endianness = DEVICE_BIG_ENDIAN, }; +static void pci_host_initfn(Object *obj) +{ + PCIHostState *phb = PCI_HOST_BRIDGE(obj); + + memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, + "pci-conf-idx", 4); + memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, + "pci-conf-data", 4); +} + +static void pci_host_realize(DeviceState *dev, Error **errp) +{ + PCIHostState *s = PCI_HOST_BRIDGE(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + sysbus_add_io(sbd, PC_PCI_CONFIG_ADDR, &s->conf_mem); + sysbus_init_ioports(sbd, PC_PCI_CONFIG_ADDR, 4); + + sysbus_add_io(sbd, PC_PCI_CONFIG_DATA, &s->data_mem); + sysbus_init_ioports(sbd, PC_PCI_CONFIG_DATA, 4); +} + +static void pci_host_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = pci_host_realize; + dc->fw_name = "pci"; +} + static const TypeInfo pci_host_type_info = { .name = TYPE_PCI_HOST_BRIDGE, .parent = TYPE_SYS_BUS_DEVICE, .abstract = true, .class_size = sizeof(PCIHostBridgeClass), + .class_init = pci_host_class_init, .instance_size = sizeof(PCIHostState), + .instance_init = pci_host_initfn, }; static void pci_host_register_types(void)