From patchwork Mon Jul 15 04:11:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 258949 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 170D72C017B for ; Mon, 15 Jul 2013 14:17:05 +1000 (EST) Received: from localhost ([::1]:49590 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaDe-0003dQ-TE for incoming@patchwork.ozlabs.org; Mon, 15 Jul 2013 00:17:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59336) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaDD-0003Zk-A5 for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:16:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UyaDC-0006Su-CU for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:16:35 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:59157) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UyaDC-0006Sk-5w for qemu-devel@nongnu.org; Mon, 15 Jul 2013 00:16:34 -0400 Received: by mail-pa0-f48.google.com with SMTP id kp12so10750649pab.35 for ; Sun, 14 Jul 2013 21:16:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=2bS1jVRnECV/lnKVaEPStwDHnwWhBo1kENYvX86IZeg=; b=SmQc/ooYuxU/0+UARB5+qbgB643jA8EyIKvTTDL6zeb5LouIhDNpAgkCc6rpt8CZvw gp4XrbPKg0sz9O/1oXaqr7ip5xScEjYAPlOIeJeS4O4A4mgLQGFMrmC6Kb9EW2XbicCE 6PETdR68bYiLwsHeMRAn7R+ZkkuPKkzqUQ85mhLQqi4AHLKSkdGwnIGAEwrOfLqb8lv/ Qoo2hPPyIwuWNdR55Aye6HLU7316jZ4P3b3/5Oqf4UHDzyuCg1JwY8MGwopQ9VbuXmDq A7m3/l86NI1FRTZaniPaOOYQogAyzBqjK7aeYsUAqj4M/m3YDd7cOvqJB/b/lufTW7Gt ldkw== X-Received: by 10.66.248.164 with SMTP id yn4mr44385477pac.153.1373861793452; Sun, 14 Jul 2013 21:16:33 -0700 (PDT) Received: from localhost ([203.126.243.116]) by mx.google.com with ESMTPSA id we2sm61947460pab.0.2013.07.14.21.16.29 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Sun, 14 Jul 2013 21:16:32 -0700 (PDT) From: peter.crosthwaite@xilinx.com To: afaerber@suse.de Date: Mon, 15 Jul 2013 14:11:58 +1000 Message-Id: <4e53f22785d64d12a9a3385bde3979051e49e451.1373861126.git.peter.crosthwaite@xilinx.com> X-Mailer: git-send-email 1.8.3.rc1.44.gb387c77.dirty In-Reply-To: References: X-Gm-Message-State: ALoCoQny1iXq2Fq8lYhB7j7QPaNAEOsk9GXpwOcmrjxbIx9pi3m3JlKOnMxVwv+LktkrCdOl9cxc X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.48 Cc: peter.maydell@linaro.org, hutao@cn.fujitsu.com, aliguori@us.ibm.com, qemu-devel@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH qom-next v3 3/4] target-microblaze: Use parent class for reset + realize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter Crosthwaite MicroblazeCPUClass is only needed for parent-class abstract function access. Just use parent classes for reset and realize access and remove MicroblazeCPUClass completely. Signed-off-by: Peter Crosthwaite --- target-microblaze/cpu-qom.h | 22 ++-------------------- target-microblaze/cpu.c | 14 ++++---------- 2 files changed, 6 insertions(+), 30 deletions(-) diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index ec2b989..b02f036 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -24,28 +24,10 @@ #define TYPE_MICROBLAZE_CPU "microblaze-cpu" -#define MICROBLAZE_CPU_CLASS(klass) \ - OBJECT_CLASS_CHECK(MicroBlazeCPUClass, (klass), TYPE_MICROBLAZE_CPU) #define MICROBLAZE_CPU(obj) \ OBJECT_CHECK(MicroBlazeCPU, (obj), TYPE_MICROBLAZE_CPU) -#define MICROBLAZE_CPU_GET_CLASS(obj) \ - OBJECT_GET_CLASS(MicroBlazeCPUClass, (obj), TYPE_MICROBLAZE_CPU) - -/** - * MicroBlazeCPUClass: - * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. - * - * A MicroBlaze CPU model. - */ -typedef struct MicroBlazeCPUClass { - /*< private >*/ - CPUClass parent_class; - /*< public >*/ - - DeviceRealize parent_realize; - void (*parent_reset)(CPUState *cpu); -} MicroBlazeCPUClass; +#define MICROBLAZE_CPU_PARENT_CLASS \ + object_class_get_parent(object_class_by_name(TYPE_MICROBLAZE_CPU)) /** * MicroBlazeCPU: diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index dce1c7e..a938ba8 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -25,15 +25,14 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" - /* CPUClass::reset() */ static void mb_cpu_reset(CPUState *s) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(s); - MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(cpu); + CPUClass *cc_parent = CPU_CLASS(MICROBLAZE_CPU_PARENT_CLASS); CPUMBState *env = &cpu->env; - mcc->parent_reset(s); + cc_parent->reset(s); memset(env, 0, offsetof(CPUMBState, breakpoints)); env->res_addr = RES_ADDR_NONE; @@ -84,11 +83,10 @@ static void mb_cpu_reset(CPUState *s) static void mb_cpu_realizefn(DeviceState *dev, Error **errp) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(dev); - MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_GET_CLASS(dev); - + DeviceClass *dc_parent = DEVICE_CLASS(MICROBLAZE_CPU_PARENT_CLASS); cpu_reset(CPU(cpu)); - mcc->parent_realize(dev, errp); + dc_parent->realize(dev, errp); } static void mb_cpu_initfn(Object *obj) @@ -123,12 +121,9 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); - MicroBlazeCPUClass *mcc = MICROBLAZE_CPU_CLASS(oc); - mcc->parent_realize = dc->realize; dc->realize = mb_cpu_realizefn; - mcc->parent_reset = cc->reset; cc->reset = mb_cpu_reset; cc->do_interrupt = mb_cpu_do_interrupt; @@ -143,7 +138,6 @@ static const TypeInfo mb_cpu_type_info = { .parent = TYPE_CPU, .instance_size = sizeof(MicroBlazeCPU), .instance_init = mb_cpu_initfn, - .class_size = sizeof(MicroBlazeCPUClass), .class_init = mb_cpu_class_init, };