diff mbox series

[v3,12/20] ppc440_sdram: Rename local variable for readibility

Message ID 4d0b81884e09ca412d3cc4de285ce2ba1c327856.1663097286.git.balaton@eik.bme.hu
State New
Headers show
Series ppc4xx_sdram QOMify and clean ups | expand

Commit Message

BALATON Zoltan Sept. 13, 2022, 7:52 p.m. UTC
Rename local sdram variable in ppc440_sdram_init to s for readibility.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/ppc/ppc440_uc.c | 36 ++++++++++++++++++------------------
 1 file changed, 18 insertions(+), 18 deletions(-)

Comments

Cédric Le Goater Sept. 14, 2022, 7:20 a.m. UTC | #1
On 9/13/22 21:52, BALATON Zoltan wrote:
> Rename local sdram variable in ppc440_sdram_init to s for readibility.
> 
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>



Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


> ---
>   hw/ppc/ppc440_uc.c | 36 ++++++++++++++++++------------------
>   1 file changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
> index b3f56c49b5..d8a7947196 100644
> --- a/hw/ppc/ppc440_uc.c
> +++ b/hw/ppc/ppc440_uc.c
> @@ -729,40 +729,40 @@ static void sdram_reset(void *opaque)
>   void ppc440_sdram_init(CPUPPCState *env, int nbanks,
>                          Ppc4xxSdramBank *ram_banks)
>   {
> -    ppc440_sdram_t *sdram;
> +    ppc440_sdram_t *s;
>       int i;
>   
> -    sdram = g_malloc0(sizeof(*sdram));
> -    sdram->nbanks = nbanks;
> +    s = g_malloc0(sizeof(*s));
> +    s->nbanks = nbanks;
>       for (i = 0; i < nbanks; i++) {
> -        sdram->bank[i].ram = ram_banks[i].ram;
> -        sdram->bank[i].base = ram_banks[i].base;
> -        sdram->bank[i].size = ram_banks[i].size;
> +        s->bank[i].ram = ram_banks[i].ram;
> +        s->bank[i].base = ram_banks[i].base;
> +        s->bank[i].size = ram_banks[i].size;
>       }
> -    qemu_register_reset(&sdram_reset, sdram);
> +    qemu_register_reset(&sdram_reset, s);
>       ppc_dcr_register(env, SDRAM0_CFGADDR,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM0_CFGDATA,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>   
>       ppc_dcr_register(env, SDRAM_R0BAS,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_R1BAS,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_R2BAS,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_R3BAS,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_CONF1HB,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_PLBADDULL,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_CONF1LL,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_CONFPATHB,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>       ppc_dcr_register(env, SDRAM_PLBADDUHB,
> -                     sdram, &dcr_read_sdram, &dcr_write_sdram);
> +                     s, &dcr_read_sdram, &dcr_write_sdram);
>   }
>   
>   /*****************************************************************************/
diff mbox series

Patch

diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index b3f56c49b5..d8a7947196 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -729,40 +729,40 @@  static void sdram_reset(void *opaque)
 void ppc440_sdram_init(CPUPPCState *env, int nbanks,
                        Ppc4xxSdramBank *ram_banks)
 {
-    ppc440_sdram_t *sdram;
+    ppc440_sdram_t *s;
     int i;
 
-    sdram = g_malloc0(sizeof(*sdram));
-    sdram->nbanks = nbanks;
+    s = g_malloc0(sizeof(*s));
+    s->nbanks = nbanks;
     for (i = 0; i < nbanks; i++) {
-        sdram->bank[i].ram = ram_banks[i].ram;
-        sdram->bank[i].base = ram_banks[i].base;
-        sdram->bank[i].size = ram_banks[i].size;
+        s->bank[i].ram = ram_banks[i].ram;
+        s->bank[i].base = ram_banks[i].base;
+        s->bank[i].size = ram_banks[i].size;
     }
-    qemu_register_reset(&sdram_reset, sdram);
+    qemu_register_reset(&sdram_reset, s);
     ppc_dcr_register(env, SDRAM0_CFGADDR,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM0_CFGDATA,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
 
     ppc_dcr_register(env, SDRAM_R0BAS,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_R1BAS,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_R2BAS,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_R3BAS,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_CONF1HB,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_PLBADDULL,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_CONF1LL,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_CONFPATHB,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
     ppc_dcr_register(env, SDRAM_PLBADDUHB,
-                     sdram, &dcr_read_sdram, &dcr_write_sdram);
+                     s, &dcr_read_sdram, &dcr_write_sdram);
 }
 
 /*****************************************************************************/