From patchwork Sat Sep 15 09:25:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fredrik Noring X-Patchwork-Id: 970341 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=nocrew.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42Cylw3QW1z9sBJ for ; Mon, 17 Sep 2018 04:42:04 +1000 (AEST) Received: from localhost ([::1]:59898 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1bze-0004Qz-5x for incoming@patchwork.ozlabs.org; Sun, 16 Sep 2018 14:42:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59736) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g1bwc-0002VH-CY for qemu-devel@nongnu.org; Sun, 16 Sep 2018 14:38:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g1bwZ-0004Qv-5D for qemu-devel@nongnu.org; Sun, 16 Sep 2018 14:38:54 -0400 Received: from ste-pvt-msa2.bahnhof.se ([213.80.101.71]:46897) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g1bwY-0004LN-PZ for qemu-devel@nongnu.org; Sun, 16 Sep 2018 14:38:51 -0400 Received: from localhost (localhost [127.0.0.1]) by ste-pvt-msa2.bahnhof.se (Postfix) with ESMTP id 9EA093F683; Sun, 16 Sep 2018 20:38:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at bahnhof.se X-Amavis-Alert: BAD HEADER SECTION, Non-encoded 8-bit data (char C3 hex): Cc: ....maydell@linaro.org>, \n \tJ\303\203\302\274rgen Urban In-Reply-To: References: From: Fredrik Noring Date: Sat, 15 Sep 2018 11:25:37 +0200 To: Aleksandar Markovic , "Maciej W. Rozycki" X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 213.80.101.71 Subject: [Qemu-devel] [PATCH v4 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , qemu-devel@nongnu.org, J??rgen Urban , Petar Jovanovic , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Fredrik Noring --- target/mips/translate.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ab16cdb911..fb571e278e 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -3768,6 +3768,57 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, tcg_temp_free(t1); } +static void gen_mul_r5900(DisasContext *ctx, uint32_t opc, + int acc, int rd, int rs, int rt) +{ + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + + gen_load_gpr(t0, rs); + gen_load_gpr(t1, rt); + + switch (opc) { + case OPC_MULT: + { + TCGv_i32 t2 = tcg_temp_new_i32(); + TCGv_i32 t3 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t2, t0); + tcg_gen_trunc_tl_i32(t3, t1); + tcg_gen_muls2_i32(t2, t3, t2, t3); + if (rd) + tcg_gen_ext_i32_tl(cpu_gpr[rd], t2); + tcg_gen_ext_i32_tl(cpu_LO[acc], t2); + tcg_gen_ext_i32_tl(cpu_HI[acc], t3); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + } + break; + case OPC_MULTU: + { + TCGv_i32 t2 = tcg_temp_new_i32(); + TCGv_i32 t3 = tcg_temp_new_i32(); + tcg_gen_trunc_tl_i32(t2, t0); + tcg_gen_trunc_tl_i32(t3, t1); + tcg_gen_mulu2_i32(t2, t3, t2, t3); + if (rd) + tcg_gen_ext_i32_tl(cpu_gpr[rd], t2); + tcg_gen_ext_i32_tl(cpu_LO[acc], t2); + tcg_gen_ext_i32_tl(cpu_HI[acc], t3); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + } + break; + default: + MIPS_INVAL("mul R5900"); + generate_exception_end(ctx, EXCP_RI); + goto out; + } + + out: + tcg_temp_free(t0); + tcg_temp_free(t1); +} + static void gen_mul_vr54xx (DisasContext *ctx, uint32_t opc, int rd, int rs, int rt) { @@ -22378,6 +22429,8 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) check_insn(ctx, INSN_VR54XX); op1 = MASK_MUL_VR54XX(ctx->opcode); gen_mul_vr54xx(ctx, op1, rd, rs, rt); + } else if (ctx->insn_flags & INSN_R5900) { + gen_mul_r5900(ctx, op1, 0, rd, rs, rt); } else { gen_muldiv(ctx, op1, rd & 3, rs, rt); }