From patchwork Sun Apr 15 16:14:30 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 152656 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id D3D64B6FD9 for ; Mon, 16 Apr 2012 02:14:46 +1000 (EST) Received: from localhost ([::1]:42808 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJS68-0006Xo-4R for incoming@patchwork.ozlabs.org; Sun, 15 Apr 2012 12:14:44 -0400 Received: from eggs.gnu.org ([208.118.235.92]:52094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJS5z-0006V5-OU for qemu-devel@nongnu.org; Sun, 15 Apr 2012 12:14:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SJS5x-0003S4-MB for qemu-devel@nongnu.org; Sun, 15 Apr 2012 12:14:35 -0400 Received: from cantor2.suse.de ([195.135.220.15]:59219 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SJS5x-0003Rj-Co; Sun, 15 Apr 2012 12:14:33 -0400 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id F31A28FD0F; Sun, 15 Apr 2012 18:14:31 +0200 (CEST) Message-ID: <4F8AF3E6.3080501@suse.de> Date: Sun, 15 Apr 2012 18:14:30 +0200 From: =?ISO-8859-1?Q?Andreas_F=E4rber?= Organization: SUSE LINUX Products GmbH User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120312 Thunderbird/11.0 MIME-Version: 1.0 To: Meador Inge References: <1334088263-10530-1-git-send-email-meadori@codesourcery.com> <4F8709F3.3030601@suse.de> <4F870FBE.9080009@freescale.com> <4F8810CB.1090909@suse.de> <4F88156D.7000104@codesourcery.com> In-Reply-To: <4F88156D.7000104@codesourcery.com> X-Enigmail-Version: 1.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 X-Received-From: 195.135.220.15 Cc: Scott Wood , Varun Sethi , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Alexander Graf Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH] target-ppc: Init dcache and icache size for e500 user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Am 13.04.2012 14:00, schrieb Meador Inge: > On 04/13/2012 06:40 AM, Andreas Färber wrote: > >> Am 12.04.2012 19:24, schrieb Scott Wood: >>> On 04/12/2012 11:59 AM, Andreas Färber wrote: >>>> Am 10.04.2012 22:04, schrieb Meador Inge: >>>>> commit f7aa558396dd0f6b7a2b22c05cb503c655854102 pulled the dcache and icache >>>>> line size initialization inside of a '#if !defined(CONFIG_USER_ONLY)' block. >>>>> This is not correct because instructions like 'dcbz' need the dcache size >>>>> initialized even for user mode. >>>>> >>>>> Signed-off-by: Meador Inge >>>> >>>> Looks okay and compiles, >>>> >>>> Reviewed-by: Andreas Färber >>>> >>>> Scott, are you planning to review this e500 patch? Or should I go ahead >>>> and apply? >>> >>> I'm OK with it, though it may make more sense for USER_ONLY to just pick >>> an arbitrary cache line size (probably 32) than to try to imitate a >>> specific core. [...] >> Scott's suggestion would avoid some #ifdef'ery so I'd prefer that if >> possible. I'm planning for a PULL later today, so let me know. > > Sounds good to me. I think the #ifdef stuff is gross, but I wasn't sure of way > around it. Not seeing a follow-up yet I've applied the following change to ppc-next: -#endif env->dcache_line_size = 64; env->icache_line_size = 64; l1cfg0 |= 0x1000000; /* 64 byte cache block size */ @@ -4499,6 +4495,7 @@ static void init_proc_e500 (CPUPPCState *env, int version) default: cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); } +#endif gen_spr_BookE206(env, 0x000000DF, tlbncfg); /* XXX : not implemented */ spr_register(env, SPR_HID0, "HID0", http://repo.or.cz/w/qemu/agraf.git/shortlog/refs/heads/ppc-next Thanks everyone, Andreas diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 86a915c..ba4b84d 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -4462,36 +4462,32 @@ static void init_proc_e500 (CPUPPCState *env, int version) &spr_read_spefscr, &spr_write_spefscr, 0x00000000); /* Memory management */ -#if !defined(CONFIG_USER_ONLY) +#if defined(CONFIG_USER_ONLY) + env->dcache_line_size = 32; + env->icache_line_size = 32; +#else /* !defined(CONFIG_USER_ONLY) */ env->nb_pids = 3; env->nb_ways = 2; env->id_tlbs = 0; -#endif switch (version) { case fsl_e500v1: /* e500v1 */ -#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(2, 1, 1, 0, 256); tlbncfg[1] = gen_tlbncfg(16, 1, 9, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); -#endif env->dcache_line_size = 32; env->icache_line_size = 32; break; case fsl_e500v2: /* e500v2 */ -#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); tlbncfg[1] = gen_tlbncfg(16, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); -#endif env->dcache_line_size = 32; env->icache_line_size = 32; break; case fsl_e500mc: /* e500mc */ -#if !defined(CONFIG_USER_ONLY) tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); tlbncfg[1] = gen_tlbncfg(64, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 64);