From patchwork Wed Nov 3 11:03:15 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 69969 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) by ozlabs.org (Postfix) with ESMTP id 4A1BEB7043 for ; Wed, 3 Nov 2010 22:09:55 +1100 (EST) Received: from localhost ([127.0.0.1]:38049 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PDb8e-0006k6-4U for incoming@patchwork.ozlabs.org; Wed, 03 Nov 2010 07:04:20 -0400 Received: from [140.186.70.92] (port=51538 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PDb7t-0006he-DY for qemu-devel@nongnu.org; Wed, 03 Nov 2010 07:03:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PDb7j-000069-7M for qemu-devel@nongnu.org; Wed, 03 Nov 2010 07:03:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11211) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PDb7i-00005D-WC for qemu-devel@nongnu.org; Wed, 03 Nov 2010 07:03:23 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id oA3B3L1t013909 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 3 Nov 2010 07:03:21 -0400 Received: from rincewind.home.kraxel.org (vpn1-4-71.ams2.redhat.com [10.36.4.71]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id oA3B3IcZ026182 for ; Wed, 3 Nov 2010 07:03:19 -0400 Message-ID: <4CD14173.7000007@redhat.com> Date: Wed, 03 Nov 2010 12:03:15 +0100 From: Gerd Hoffmann User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.9) Gecko/20100827 Red Hat/3.1.3-1.el6 Thunderbird/3.1.3 MIME-Version: 1.0 To: "qemu-devel@nongnu.org" X-Scanned-By: MIMEDefang 2.67 on 10.5.11.12 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Subject: [Qemu-devel] MSI broken? X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Hi, What is the status if the recently merged MSI support? I'm trying to use it to add msi support to the intel-hda driver (current wip patch attached). Everything works fine up to the point where it comes to delivering the interrupt to the guest. msi_notify pretends to signal the guest: msi_notify:243 intel-hda:30 notify vector 0x0 address: 0xfee01008 data: 0x4151 The guest never ever receives this interrupt though: [root@localhost ~]# grep hda /proc/interrupts 43: 0 PCI-MSI-edge hda_intel Ideas anyone? thanks, Gerd From b2ca133855b78e5b6cfc3e52220769a031485939 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Wed, 3 Nov 2010 10:14:48 +0100 Subject: [PATCH] intel-hda: msi support [wip] --- hw/intel-hda.c | 30 ++++++++++++++++++++++++++++-- 1 files changed, 28 insertions(+), 2 deletions(-) diff --git a/hw/intel-hda.c b/hw/intel-hda.c index 126cf54..63cccbe 100644 --- a/hw/intel-hda.c +++ b/hw/intel-hda.c @@ -19,6 +19,7 @@ #include "hw.h" #include "pci.h" +#include "msi.h" #include "qemu-timer.h" #include "audiodev.h" #include "intel-hda.h" @@ -188,6 +189,7 @@ struct IntelHDAState { /* properties */ uint32_t debug; + uint32_t msi; }; struct IntelHDAReg { @@ -268,6 +270,7 @@ static void intel_hda_update_int_sts(IntelHDAState *d) static void intel_hda_update_irq(IntelHDAState *d) { + int msi = d->msi && msi_enabled(&d->pci); int level; intel_hda_update_int_sts(d); @@ -276,8 +279,15 @@ static void intel_hda_update_irq(IntelHDAState *d) } else { level = 0; } - dprint(d, 2, "%s: level %d\n", __FUNCTION__, level); - qemu_set_irq(d->pci.irq[0], level); + dprint(d, 2, "%s: level %d [%s]\n", __FUNCTION__, + level, msi ? "msi" : "intx"); + if (msi) { + if (level) { + msi_notify(&d->pci, 0); + } + } else { + qemu_set_irq(d->pci.irq[0], level); + } } static int intel_hda_send_command(IntelHDAState *d, uint32_t verb) @@ -1132,6 +1142,8 @@ static int intel_hda_init(PCIDevice *pci) intel_hda_mmio_write, d); pci_register_bar(&d->pci, 0, 0x4000, PCI_BASE_ADDRESS_SPACE_MEMORY, intel_hda_map); + if (d->msi) + msi_init(&d->pci, 0, 1, true, false); hda_codec_bus_init(&d->pci.qdev, &d->codecs, intel_hda_response, intel_hda_xfer); @@ -1143,10 +1155,22 @@ static int intel_hda_exit(PCIDevice *pci) { IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); + if (d->msi) + msi_uninit(&d->pci); cpu_unregister_io_memory(d->mmio_addr); return 0; } +static void intel_hda_write_config(PCIDevice *pci, uint32_t addr, + uint32_t val, int len) +{ + IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); + + pci_default_write_config(pci, addr, val, len); + if (d->msi) + msi_write_config(pci, addr, val, len); +} + static int intel_hda_post_load(void *opaque, int version) { IntelHDAState* d = opaque; @@ -1230,8 +1254,10 @@ static PCIDeviceInfo intel_hda_info = { .qdev.reset = intel_hda_reset, .init = intel_hda_init, .exit = intel_hda_exit, + .config_write = intel_hda_write_config, .qdev.props = (Property[]) { DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0), + DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 0), DEFINE_PROP_END_OF_LIST(), } };