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Tue, 30 Apr 2024 13:34:09 -0400 (EDT) From: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= , Stefano Stabellini , Anthony Perard , Paul Durrant , xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PATCH v2 1/3] hw/xen/xen_pt: Save back data only for declared registers Date: Tue, 30 Apr 2024 19:33:09 +0200 Message-ID: <3cc5a7d2e0338112fb87806c813627bdf5dbd2a5.1714498385.git-series.marmarek@invisiblethingslab.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: none client-ip=64.147.123.159; envelope-from=marmarek@invisiblethingslab.com; helo=wfhigh8-smtp.messagingengine.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_NONE=0.001, URIBL_SBL_A=0.1 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Call pci_default_write_config() in xen_pt_pci_write_config() only for registers that have matching XenPTRegInfo structure, and do that only after resolving any custom handlers. This is important for two reasons: 1. XenPTRegInfo has ro_mask which needs to be enforced - Xen-specific hooks do that on their own (especially xen_pt_*_reg_write()). 2. Not setting value early allows hooks to see the old value too. If it would be only about the first point, setting PCIDevice.wmask would probably be sufficient, but given the second point, restructure those writes. Signed-off-by: Marek Marczykowski-Górecki --- v2: - rewrite commit message, previous one was very misleading - fix loop saving register values - fix int overflow when calculating write mask --- hw/xen/xen_pt.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 3635d1b..cea2e18 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -256,6 +256,7 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, uint32_t find_addr = addr; XenPTRegInfo *reg = NULL; bool wp_flag = false; + uint32_t emul_mask = 0, write_val; if (xen_pt_pci_config_access_check(d, addr, len)) { return; @@ -311,7 +312,6 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, } memory_region_transaction_begin(); - pci_default_write_config(d, addr, val, len); /* adjust the read and write value to appropriate CFC-CFF window */ read_val <<= (addr & 3) << 3; @@ -371,6 +371,9 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, return; } + emul_mask |= ((1L << (reg->size * 8)) - 1) + << ((find_addr & 3) * 8); + /* calculate next address to find */ emul_len -= reg->size; if (emul_len > 0) { @@ -397,6 +400,25 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, /* need to shift back before passing them to xen_host_pci_set_block. */ val >>= (addr & 3) << 3; + /* store emulated registers after calling their handlers */ + write_val = val; + for (index = 0; index < len; index += emul_len) { + emul_len = 0; + while (emul_mask & 0xff) { + emul_len++; + emul_mask >>= 8; + } + if (emul_len) { + uint32_t mask = ((1L << (emul_len * 8)) - 1); + pci_default_write_config(d, addr + index, write_val & mask, + emul_len); + } else { + emul_mask >>= 8; + emul_len = 1; + } + write_val >>= emul_len * 8; + } + memory_region_transaction_commit(); out: