From patchwork Sat May 21 08:01:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe Dubois X-Patchwork-Id: 624722 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rBcp766LYz9t5Y for ; Sat, 21 May 2016 18:06:39 +1000 (AEST) Received: from localhost ([::1]:39248 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b41vh-00035L-KD for incoming@patchwork.ozlabs.org; Sat, 21 May 2016 04:06:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37135) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b41qn-0006i7-Ig for qemu-devel@nongnu.org; Sat, 21 May 2016 04:01:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b41qg-0002yM-Ko for qemu-devel@nongnu.org; Sat, 21 May 2016 04:01:32 -0400 Received: from zose-mta05.web4all.fr ([185.49.20.50]:53483) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b41qg-0002xk-Ei for qemu-devel@nongnu.org; Sat, 21 May 2016 04:01:26 -0400 Received: from localhost (localhost [127.0.0.1]) by zose-mta05.web4all.fr (Postfix) with ESMTP id CBAEB4058C; Sat, 21 May 2016 10:01:25 +0200 (CEST) Received: from zose-mta05.web4all.fr ([127.0.0.1]) by localhost (zose-mta05.web4all.fr [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id KFx-MHTDnQ5j; Sat, 21 May 2016 10:01:25 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zose-mta05.web4all.fr (Postfix) with ESMTP id 745A840789; Sat, 21 May 2016 10:01:25 +0200 (CEST) X-Virus-Scanned: amavisd-new at zose-mta-05.w4a.fr Received: from zose-mta05.web4all.fr ([127.0.0.1]) by localhost (zose-mta05.web4all.fr [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id eQn6Etq9iLAv; Sat, 21 May 2016 10:01:25 +0200 (CEST) Received: from localhost.localdomain (smm49-1-78-235-240-156.fbx.proxad.net [78.235.240.156]) by zose-mta05.web4all.fr (Postfix) with ESMTPSA id 2B4B44058C; Sat, 21 May 2016 10:01:25 +0200 (CEST) From: Jean-Christophe Dubois To: qemu-devel@nongnu.org, peter.maydell@linaro.org, jasowang@redhat.com Date: Sat, 21 May 2016 10:01:24 +0200 Message-Id: <38a7f81b1b7e10b333b90e4a59144937b8b5a506.1463816701.git.jcd@tribudubois.net> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 185.49.20.50 Subject: [Qemu-devel] [PATCH v5 03/10] i.MX: Fix FEC code for MDIO operation selection X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Christophe Dubois Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" According to the FEC chapter of i.MX25 reference manual When writing the MMFR register, bit 29 and 28 select the requested operation. * 10 means read operation with valid MII mgmt frame * 11 means read operation with non compliant MII mgmt frame * 01 means write operation with valid MII mgmt frame * 00 means write operation with non compliant MII mgmt frame So while bit 28 does change beween read/write for valid MII mgmt frame, the mening is inverted for non compliant MII mgmt frame. Bit 29 on the other hand means read/write whatever the type of mgmt frame involved. So this patch change the operation selection from bit 28 to bit 29 as it is more generic. Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1 Changes since v2: * Not present on v2 Changes since v3: * Not present on v3 Changes since v4: * None hw/net/imx_fec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index e60e338..b3f5e4a 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -458,10 +458,10 @@ static void imx_fec_write(void *opaque, hwaddr addr, case 0x040: /* MMFR */ /* store the value */ s->mmfr = value; - if (extract32(value, 28, 1)) { - do_phy_write(s, extract32(value, 18, 9), extract32(value, 0, 16)); - } else { + if (extract32(value, 29, 1)) { s->mmfr = do_phy_read(s, extract32(value, 18, 9)); + } else { + do_phy_write(s, extract32(value, 18, 9), extract32(value, 0, 16)); } /* raise the interrupt as the PHY operation is done */ s->eir |= FEC_INT_MII;