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([195.76.196.165]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3502bbbbf20sm6764797f8f.93.2024.05.11.04.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 11 May 2024 04:54:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Subject: [PATCH 09/17] ppc64: Clean up reginfo_dump Date: Sat, 11 May 2024 13:53:52 +0200 Message-Id: <20240511115400.7587-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511115400.7587-1-richard.henderson@linaro.org> References: <20240511115400.7587-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=richard.henderson@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Dump only the registers that we copied in reginfo_init. Improve the formatting and layout of what we do dump. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- risu_reginfo_ppc64.c | 51 ++++++++++++++++++-------------------------- 1 file changed, 21 insertions(+), 30 deletions(-) diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c index e0c650b..730a565 100644 --- a/risu_reginfo_ppc64.c +++ b/risu_reginfo_ppc64.c @@ -75,38 +75,29 @@ void reginfo_dump(struct reginfo *ri, FILE * f) { int i; - fprintf(f, " faulting insn 0x%x\n", ri->faulting_insn); - fprintf(f, " prev insn 0x%x\n", ri->prev_insn); - fprintf(f, " prev addr 0x%" PRIx64 "\n\n", ri->nip); - - for (i = 0; i < 16; i++) { - fprintf(f, "\tr%2d: %16lx\tr%2d: %16lx\n", i, ri->gregs[i], - i + 16, ri->gregs[i + 16]); - } - - fprintf(f, "\n"); - fprintf(f, "\tnip : %16lx\n", ri->gregs[32]); - fprintf(f, "\tmsr : %16lx\n", ri->gregs[33]); - fprintf(f, "\torig r3: %16lx\n", ri->gregs[34]); - fprintf(f, "\tctr : %16lx\n", ri->gregs[35]); - fprintf(f, "\tlnk : %16lx\n", ri->gregs[36]); - fprintf(f, "\txer : %16lx\n", ri->gregs[37]); - fprintf(f, "\tccr : %16lx\n", ri->gregs[38]); - fprintf(f, "\tmq : %16lx\n", ri->gregs[39]); - fprintf(f, "\ttrap : %16lx\n", ri->gregs[40]); - fprintf(f, "\tdar : %16lx\n", ri->gregs[41]); - fprintf(f, "\tdsisr : %16lx\n", ri->gregs[42]); - fprintf(f, "\tresult : %16lx\n", ri->gregs[43]); - fprintf(f, "\tdscr : %16lx\n\n", ri->gregs[44]); - - for (i = 0; i < 16; i++) { - fprintf(f, "\tf%2d: %016lx\tf%2d: %016lx\n", i, ri->fpregs[i], - i + 16, ri->fpregs[i + 16]); - } - fprintf(f, "\tfpscr: %016lx\n\n", ri->fpscr); + fprintf(f, "%6s: %08x\n", "insn", ri->faulting_insn); + fprintf(f, "%6s: %016lx\n", "pc", ri->nip); for (i = 0; i < 32; i++) { - fprintf(f, "vr%02d: %8x, %8x, %8x, %8x\n", i, + fprintf(f, "%*s%d: %016lx%s", + 6 - (i < 10 ? 1 : 2), "r", i, ri->gregs[i], + i & 1 ? "\n" : " "); + } + + fprintf(f, "%6s: %016lx %6s: %016lx\n", + "xer", ri->gregs[XER], + "ccr", ri->gregs[CCR]); + + for (i = 0; i < 32; i++) { + fprintf(f, "%*s%d: %016lx%s", + 6 - (i < 10 ? 1 : 2), "f", i, ri->fpregs[i], + i & 1 ? "\n" : " "); + } + fprintf(f, "%6s: %016lx\n", "fpscr", ri->fpscr); + + for (i = 0; i < 32; i++) { + fprintf(f, "%*s%d: %08x %08x %08x %08x\n", + 6 - (i < 10 ? 1 : 2), "vr", i, ri->vrregs.vrregs[i][0], ri->vrregs.vrregs[i][1], ri->vrregs.vrregs[i][2], ri->vrregs.vrregs[i][3]); }