| Message ID | 20240418192525.97451-8-philmd@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | include/exec: Rework (part 2) | expand |
On 4/18/24 12:25, Philippe Mathieu-Daudé wrote: > Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB > API. Un-inline the user emulation definition to avoid including > "exec/cpu_ldst.h" (which declares g2h) in "exec/cputlb.h". > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > include/exec/cpu_ldst.h | 24 ------------------------ > include/exec/cputlb.h | 18 ++++++++++++++++++ > accel/tcg/user-exec.c | 7 +++++++ > target/arm/tcg/helper-a64.c | 1 + > target/riscv/vector_helper.c | 1 + > target/sparc/mmu_helper.c | 1 + > 6 files changed, 28 insertions(+), 24 deletions(-) > > diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h > index 63186b07e4..7032949dba 100644 > --- a/include/exec/cpu_ldst.h > +++ b/include/exec/cpu_ldst.h > @@ -418,28 +418,4 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) > return (int16_t)cpu_lduw_code(env, addr); > } > > -/** > - * tlb_vaddr_to_host: > - * @env: CPUArchState > - * @addr: guest virtual address to look up > - * @access_type: 0 for read, 1 for write, 2 for execute > - * @mmu_idx: MMU index to use for lookup > - * > - * Look up the specified guest virtual index in the TCG softmmu TLB. > - * If we can translate a host virtual address suitable for direct RAM > - * access, without causing a guest exception, then return it. > - * Otherwise (TLB entry is for an I/O access, guest software > - * TLB fill required, etc) return NULL. > - */ > -#ifdef CONFIG_USER_ONLY > -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, > - MMUAccessType access_type, int mmu_idx) > -{ > - return g2h(env_cpu(env), addr); > -} > -#else > -void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, > - MMUAccessType access_type, int mmu_idx); > -#endif > - > #endif /* CPU_LDST_H */ > diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h > index ef18642a32..173eb98b9a 100644 > --- a/include/exec/cputlb.h > +++ b/include/exec/cputlb.h > @@ -20,10 +20,28 @@ > #ifndef CPUTLB_H > #define CPUTLB_H > > +#include "exec/abi_ptr.h" > #include "exec/cpu-common.h" > +#include "exec/mmu-access-type.h" > > #ifdef CONFIG_TCG > > +/** > + * tlb_vaddr_to_host: > + * @env: CPUArchState > + * @addr: guest virtual address to look up > + * @access_type: 0 for read, 1 for write, 2 for execute > + * @mmu_idx: MMU index to use for lookup > + * > + * Look up the specified guest virtual index in the TCG softmmu TLB. > + * If we can translate a host virtual address suitable for direct RAM > + * access, without causing a guest exception, then return it. > + * Otherwise (TLB entry is for an I/O access, guest software > + * TLB fill required, etc) return NULL. > + */ > +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, > + MMUAccessType access_type, int mmu_idx); > + Why have you chosen cputlb.h, when the other probe functions are in exec-all.h? Alternately, we only have two users remaining, which could be migrated to the newer interfaces... r~
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 63186b07e4..7032949dba 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -418,28 +418,4 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) return (int16_t)cpu_lduw_code(env, addr); } -/** - * tlb_vaddr_to_host: - * @env: CPUArchState - * @addr: guest virtual address to look up - * @access_type: 0 for read, 1 for write, 2 for execute - * @mmu_idx: MMU index to use for lookup - * - * Look up the specified guest virtual index in the TCG softmmu TLB. - * If we can translate a host virtual address suitable for direct RAM - * access, without causing a guest exception, then return it. - * Otherwise (TLB entry is for an I/O access, guest software - * TLB fill required, etc) return NULL. - */ -#ifdef CONFIG_USER_ONLY -static inline void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx) -{ - return g2h(env_cpu(env), addr); -} -#else -void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, - MMUAccessType access_type, int mmu_idx); -#endif - #endif /* CPU_LDST_H */ diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index ef18642a32..173eb98b9a 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -20,10 +20,28 @@ #ifndef CPUTLB_H #define CPUTLB_H +#include "exec/abi_ptr.h" #include "exec/cpu-common.h" +#include "exec/mmu-access-type.h" #ifdef CONFIG_TCG +/** + * tlb_vaddr_to_host: + * @env: CPUArchState + * @addr: guest virtual address to look up + * @access_type: 0 for read, 1 for write, 2 for execute + * @mmu_idx: MMU index to use for lookup + * + * Look up the specified guest virtual index in the TCG softmmu TLB. + * If we can translate a host virtual address suitable for direct RAM + * access, without causing a guest exception, then return it. + * Otherwise (TLB entry is for an I/O access, guest software + * TLB fill required, etc) return NULL. + */ +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx); + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 1c621477ad..54b35588b9 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -23,6 +23,7 @@ #include "tcg/tcg.h" #include "qemu/bitops.h" #include "qemu/rcu.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "exec/translate-all.h" #include "exec/helper-proto.h" @@ -138,6 +139,12 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, } } +void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, + MMUAccessType access_type, int mmu_idx) +{ + return g2h(env_cpu(env), addr); +} + typedef struct PageFlagsNode { struct rcu_head rcu; IntervalTreeNode itree; diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index ebaa7f00df..9b3ae06207 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -29,6 +29,7 @@ #include "internals.h" #include "qemu/crc32c.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index fa139040f8..d3d9c33597 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/memop.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index ad1591d9fd..e79a33367a 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/cputlb.h" #include "qemu/qemu-print.h" #include "trace.h"
Declare tlb_vaddr_to_host() in "exec/cputlb.h" with the CPU TLB API. Un-inline the user emulation definition to avoid including "exec/cpu_ldst.h" (which declares g2h) in "exec/cputlb.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- include/exec/cpu_ldst.h | 24 ------------------------ include/exec/cputlb.h | 18 ++++++++++++++++++ accel/tcg/user-exec.c | 7 +++++++ target/arm/tcg/helper-a64.c | 1 + target/riscv/vector_helper.c | 1 + target/sparc/mmu_helper.c | 1 + 6 files changed, 28 insertions(+), 24 deletions(-)