| Message ID | 20231218185114.119736-12-shentey@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | hw/isa/vt82c686: Implement relocation and toggling of SuperI/O functions | expand |
On Mon, 18 Dec 2023, Bernhard Beschow wrote: > This is a preparation for implementing relocation and toggling of SuperI/O > functions in the VT8231 device model. Upon reset, all SuperI/O functions will be > deactivated, so in case if no -bios is given, let the machine configure those > functions the same way pegasos2.rom would do. For now the meantime this will be "same way pegasos2 firmware would do". You can drop the last sentence about no-op as it does not make much sense as it is or reword it if you want to keep it. Regards, BALATON Zoltan > a no-op. > > Signed-off-by: Bernhard Beschow <shentey@gmail.com> > --- > hw/ppc/pegasos2.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c > index 3203a4a728..0a40ebd542 100644 > --- a/hw/ppc/pegasos2.c > +++ b/hw/ppc/pegasos2.c > @@ -285,6 +285,15 @@ static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus, > pegasos2_mv_reg_write(pm, pcicfg + 4, len, val); > } > > +static void pegasos2_superio_write(Pegasos2MachineState *pm, uint32_t addr, > + uint32_t val) > +{ > + AddressSpace *as = CPU(pm->cpu)->as; > + > + stb_phys(as, PCI1_IO_BASE + 0x3f0, addr); > + stb_phys(as, PCI1_IO_BASE + 0x3f1, val); > +} > + > static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) > { > Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); > @@ -310,6 +319,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) > > pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > PCI_INTERRUPT_LINE, 2, 0x9); > + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > + 0x50, 1, 0x6); > + pegasos2_superio_write(pm, 0xf4, 0xbe); > + pegasos2_superio_write(pm, 0xf6, 0xef); > + pegasos2_superio_write(pm, 0xf7, 0xfc); > + pegasos2_superio_write(pm, 0xf2, 0x14); > pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | > 0x50, 1, 0x2); > pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >
Am 19. Dezember 2023 00:11:37 UTC schrieb BALATON Zoltan <balaton@eik.bme.hu>: >On Mon, 18 Dec 2023, Bernhard Beschow wrote: >> This is a preparation for implementing relocation and toggling of SuperI/O >> functions in the VT8231 device model. Upon reset, all SuperI/O functions will be >> deactivated, so in case if no -bios is given, let the machine configure those >> functions the same way pegasos2.rom would do. For now the meantime this will be > >"same way pegasos2 firmware would do". Good idea. Will change. > You can drop the last sentence about no-op as it does not make much sense as it is or reword it if you want to keep it. Yeah, I messed up the last sentence somehow. I'll drop it then. Best regards, Bernhard > >Regards, >BALATON Zoltan > >> a no-op. >> >> Signed-off-by: Bernhard Beschow <shentey@gmail.com> >> --- >> hw/ppc/pegasos2.c | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >> >> diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c >> index 3203a4a728..0a40ebd542 100644 >> --- a/hw/ppc/pegasos2.c >> +++ b/hw/ppc/pegasos2.c >> @@ -285,6 +285,15 @@ static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus, >> pegasos2_mv_reg_write(pm, pcicfg + 4, len, val); >> } >> >> +static void pegasos2_superio_write(Pegasos2MachineState *pm, uint32_t addr, >> + uint32_t val) >> +{ >> + AddressSpace *as = CPU(pm->cpu)->as; >> + >> + stb_phys(as, PCI1_IO_BASE + 0x3f0, addr); >> + stb_phys(as, PCI1_IO_BASE + 0x3f1, val); >> +} >> + >> static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) >> { >> Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); >> @@ -310,6 +319,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) >> >> pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> PCI_INTERRUPT_LINE, 2, 0x9); >> + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> + 0x50, 1, 0x6); >> + pegasos2_superio_write(pm, 0xf4, 0xbe); >> + pegasos2_superio_write(pm, 0xf6, 0xef); >> + pegasos2_superio_write(pm, 0xf7, 0xfc); >> + pegasos2_superio_write(pm, 0xf2, 0x14); >> pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >> 0x50, 1, 0x2); >> pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | >>
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index 3203a4a728..0a40ebd542 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -285,6 +285,15 @@ static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus, pegasos2_mv_reg_write(pm, pcicfg + 4, len, val); } +static void pegasos2_superio_write(Pegasos2MachineState *pm, uint32_t addr, + uint32_t val) +{ + AddressSpace *as = CPU(pm->cpu)->as; + + stb_phys(as, PCI1_IO_BASE + 0x3f0, addr); + stb_phys(as, PCI1_IO_BASE + 0x3f1, val); +} + static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) { Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); @@ -310,6 +319,12 @@ static void pegasos2_machine_reset(MachineState *machine, ShutdownCause reason) pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | PCI_INTERRUPT_LINE, 2, 0x9); + pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | + 0x50, 1, 0x6); + pegasos2_superio_write(pm, 0xf4, 0xbe); + pegasos2_superio_write(pm, 0xf6, 0xef); + pegasos2_superio_write(pm, 0xf7, 0xfc); + pegasos2_superio_write(pm, 0xf2, 0x14); pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) | 0x50, 1, 0x2); pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 0) << 8) |
This is a preparation for implementing relocation and toggling of SuperI/O functions in the VT8231 device model. Upon reset, all SuperI/O functions will be deactivated, so in case if no -bios is given, let the machine configure those functions the same way pegasos2.rom would do. For now the meantime this will be a no-op. Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- hw/ppc/pegasos2.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)