| Message ID | 20231018082408.888098-1-lizhijian@fujitsu.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] hw/cxl: Pass CXLComponentState to cache_mem_ops | expand |
On 19/10/2023 18:50, Jonathan Cameron wrote: > On Wed, 18 Oct 2023 16:24:07 +0800 > Li Zhijian <lizhijian@fujitsu.com> wrote: > >> cache_mem_ops.{read,write}() interprets opaque as >> CXLComponentState(cxl_cstate) instead of ComponentRegisters(cregs). >> >> Fortunately, cregs is the first member of cxl_cstate, so their values are >> the same. >> >> Fixes: 9e58f52d3f8 ("hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)") >> Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> > > Both these lgtm. I'll carry them on my CXL tree and add them to the next > series I send out for general cleaup etc, Well, I'm fine with this. but if you send them again > cc Michael Tsirkin so he has the option to pick them up directly if he wishes > (all CXL changes got through Michael currently). Good to know this Thanks Zhijian > >> --- >> V2: change the source side since cache_mem_ops.{read,write}() will use >> cxl_cstate. >> --- >> hw/cxl/cxl-component-utils.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c >> index f3bbf0fd131..6214dcdcc12 100644 >> --- a/hw/cxl/cxl-component-utils.c >> +++ b/hw/cxl/cxl-component-utils.c >> @@ -179,7 +179,7 @@ void cxl_component_register_block_init(Object *obj, >> /* io registers controls link which we don't care about in QEMU */ >> memory_region_init_io(&cregs->io, obj, NULL, cregs, ".io", >> CXL2_COMPONENT_IO_REGION_SIZE); >> - memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cregs, >> + memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cxl_cstate, >> ".cache_mem", CXL2_COMPONENT_CM_REGION_SIZE); >> >> memory_region_add_subregion(&cregs->component_registers, 0, &cregs->io); >
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index f3bbf0fd131..6214dcdcc12 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -179,7 +179,7 @@ void cxl_component_register_block_init(Object *obj, /* io registers controls link which we don't care about in QEMU */ memory_region_init_io(&cregs->io, obj, NULL, cregs, ".io", CXL2_COMPONENT_IO_REGION_SIZE); - memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cregs, + memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cxl_cstate, ".cache_mem", CXL2_COMPONENT_CM_REGION_SIZE); memory_region_add_subregion(&cregs->component_registers, 0, &cregs->io);
cache_mem_ops.{read,write}() interprets opaque as CXLComponentState(cxl_cstate) instead of ComponentRegisters(cregs). Fortunately, cregs is the first member of cxl_cstate, so their values are the same. Fixes: 9e58f52d3f8 ("hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)") Signed-off-by: Li Zhijian <lizhijian@fujitsu.com> --- V2: change the source side since cache_mem_ops.{read,write}() will use cxl_cstate. --- hw/cxl/cxl-component-utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)