@@ -49,6 +49,7 @@ struct PIIXState {
#endif
uint64_t pic_levels;
+ qemu_irq cpu_intr;
qemu_irq isa_irqs_in[ISA_NUM_IRQS];
/* This member isn't used. Just for save/load compatibility */
@@ -42,21 +42,9 @@
#include "sysemu/runstate.h"
#include "qom/object.h"
-struct PIIX4State {
- PCIDevice dev;
- qemu_irq cpu_intr;
- qemu_irq *isa_irqs_in;
-
- MC146818RtcState rtc;
- PCIIDEState ide;
- UHCIState uhci;
- PIIX4PMState pm;
- /* Reset Control Register */
- MemoryRegion rcr_mem;
- uint8_t rcr;
-};
+typedef struct PIIXState PIIX4State;
-OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
+DECLARE_INSTANCE_CHECKER(PIIX4State, PIIX4_PCI_DEVICE, TYPE_PIIX4_PCI_DEVICE)
static void piix4_set_irq(void *opaque, int irq_num, int level)
{
@@ -184,6 +172,8 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
PCIBus *pci_bus = pci_get_bus(dev);
ISABus *isa_bus;
qemu_irq *i8259_out_irq;
+ qemu_irq *i8259;
+ size_t i;
isa_bus = isa_bus_new(DEVICE(dev), pci_address_space(dev),
pci_address_space_io(dev), errp);
@@ -201,7 +191,13 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
/* initialize i8259 pic */
i8259_out_irq = qemu_allocate_irqs(piix4_request_i8259_irq, s, 1);
- s->isa_irqs_in = i8259_init(isa_bus, *i8259_out_irq);
+ i8259 = i8259_init(isa_bus, *i8259_out_irq);
+
+ for (i = 0; i < ISA_NUM_IRQS; i++) {
+ s->isa_irqs_in[i] = i8259[i];
+ }
+
+ g_free(i8259);
/* initialize ISA irqs */
isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
PIIX4 has its own, private PIIX4State structure. PIIX3 has almost the same structure, provided in a public header. So reuse it and add a cpu_intr attribute to it which is only used by PIIX4. Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- include/hw/southbridge/piix.h | 1 + hw/isa/piix4.c | 26 +++++++++++--------------- 2 files changed, 12 insertions(+), 15 deletions(-)