| Message ID | 20230721221320.1311E7456AB@zero.eik.bme.hu |
|---|---|
| State | New |
| Headers | show |
| Series | ppc/pegasos2: Fix reg property of 64 bit BARs in device tree | expand |
On Sat, 22 Jul 2023, BALATON Zoltan wrote: > The board firmware handles this correctly following the Open Firmware > standard which we missed. This fixes 64 bit BARs when using VOF. In case it helps review this is defined in page 5 of this document: https://www.openbios.org/data/docs/bus.pci.pdf > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > hw/ppc/pegasos2.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c > index 6475acfbed..075367d94d 100644 > --- a/hw/ppc/pegasos2.c > +++ b/hw/ppc/pegasos2.c > @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque) > if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) { > cells[j] |= cpu_to_be32(1 << 24); > } else { > - cells[j] |= cpu_to_be32(2 << 24); > + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) { > + cells[j] |= cpu_to_be32(3 << 24); > + } else { > + cells[j] |= cpu_to_be32(2 << 24); > + } > if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) { > cells[j] |= cpu_to_be32(4 << 28); > } >
On 7/21/23 19:13, BALATON Zoltan wrote: > The board firmware handles this correctly following the Open Firmware > standard which we missed. This fixes 64 bit BARs when using VOF. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> And queued. Thanks, Daniel > hw/ppc/pegasos2.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c > index 6475acfbed..075367d94d 100644 > --- a/hw/ppc/pegasos2.c > +++ b/hw/ppc/pegasos2.c > @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque) > if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) { > cells[j] |= cpu_to_be32(1 << 24); > } else { > - cells[j] |= cpu_to_be32(2 << 24); > + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) { > + cells[j] |= cpu_to_be32(3 << 24); > + } else { > + cells[j] |= cpu_to_be32(2 << 24); > + } > if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) { > cells[j] |= cpu_to_be32(4 << 28); > }
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index 6475acfbed..075367d94d 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -781,7 +781,11 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque) if (d->io_regions[i].type & PCI_BASE_ADDRESS_SPACE_IO) { cells[j] |= cpu_to_be32(1 << 24); } else { - cells[j] |= cpu_to_be32(2 << 24); + if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_TYPE_64) { + cells[j] |= cpu_to_be32(3 << 24); + } else { + cells[j] |= cpu_to_be32(2 << 24); + } if (d->io_regions[i].type & PCI_BASE_ADDRESS_MEM_PREFETCH) { cells[j] |= cpu_to_be32(4 << 28); }
The board firmware handles this correctly following the Open Firmware standard which we missed. This fixes 64 bit BARs when using VOF. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- hw/ppc/pegasos2.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)