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[4/7] disas/riscv.c: Support disas for Z*inx extensions

Message ID 20230519021926.15362-5-liweiwei@iscas.ac.cn
State New
Headers show
Series Add support for extension specific disas | expand

Commit Message

Weiwei Li May 19, 2023, 2:19 a.m. UTC 
Support disas for Z*inx instructions only when Zfinx extension is supported.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
---
 disas/riscv.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

Comments

Daniel Henrique Barboza May 22, 2023, 1:02 p.m. UTC | #1 
On 5/18/23 23:19, Weiwei Li wrote:
> Support disas for Z*inx instructions only when Zfinx extension is supported.
> 
> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   disas/riscv.c | 16 ++++++++++++----
>   1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/disas/riscv.c b/disas/riscv.c
> index 9e01810eef..a370bac6ef 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -4590,16 +4590,24 @@ static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
>               append(buf, rv_ireg_name_sym[dec->rs2], buflen);
>               break;
>           case '3':
> -            append(buf, rv_freg_name_sym[dec->rd], buflen);
> +            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rd] :
> +                                              rv_freg_name_sym[dec->rd],
> +                   buflen);
>               break;
>           case '4':
> -            append(buf, rv_freg_name_sym[dec->rs1], buflen);
> +            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs1] :
> +                                              rv_freg_name_sym[dec->rs1],
> +                   buflen);
>               break;
>           case '5':
> -            append(buf, rv_freg_name_sym[dec->rs2], buflen);
> +            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs2] :
> +                                              rv_freg_name_sym[dec->rs2],
> +                   buflen);
>               break;
>           case '6':
> -            append(buf, rv_freg_name_sym[dec->rs3], buflen);
> +            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs3] :
> +                                              rv_freg_name_sym[dec->rs3],
> +                   buflen);
>               break;
>           case '7':
>               snprintf(tmp, sizeof(tmp), "%d", dec->rs1);
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Patch

diff --git a/disas/riscv.c b/disas/riscv.c
index 9e01810eef..a370bac6ef 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -4590,16 +4590,24 @@  static void format_inst(char *buf, size_t buflen, size_t tab, rv_decode *dec)
             append(buf, rv_ireg_name_sym[dec->rs2], buflen);
             break;
         case '3':
-            append(buf, rv_freg_name_sym[dec->rd], buflen);
+            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rd] :
+                                              rv_freg_name_sym[dec->rd],
+                   buflen);
             break;
         case '4':
-            append(buf, rv_freg_name_sym[dec->rs1], buflen);
+            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs1] :
+                                              rv_freg_name_sym[dec->rs1],
+                   buflen);
             break;
         case '5':
-            append(buf, rv_freg_name_sym[dec->rs2], buflen);
+            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs2] :
+                                              rv_freg_name_sym[dec->rs2],
+                   buflen);
             break;
         case '6':
-            append(buf, rv_freg_name_sym[dec->rs3], buflen);
+            append(buf, dec->cfg->ext_zfinx ? rv_ireg_name_sym[dec->rs3] :
+                                              rv_freg_name_sym[dec->rs3],
+                   buflen);
             break;
         case '7':
             snprintf(tmp, sizeof(tmp), "%d", dec->rs1);