diff mbox series

[RFC,v2,6/9] hw/riscv: meson: add CBQRI controllers to the build

Message ID 20230425203834.1135306-7-dfustini@baylibre.com
State New
Headers show
Series riscv: implement Ssqosid extension and CBQRI controllers | expand

Commit Message

Drew Fustini April 25, 2023, 8:38 p.m. UTC 
From: Nicolas Pitre <npitre@baylibre.com>

Build the CBQRI controllers when RISC-V CBQRI is enabled by Kconfig.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
Changes since v1:
- remove example SoC now that command line arguments supported for CBQRI

 hw/riscv/meson.build | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build
index 2f7ee81be3ca..2281d17d0b09 100644
--- a/hw/riscv/meson.build
+++ b/hw/riscv/meson.build
@@ -10,5 +10,7 @@  riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c'))
 riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c'))
 riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c'))
 riscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c'))
+riscv_ss.add(when: 'CONFIG_RISCV_CBQRI',
+              if_true: files('cbqri_capacity.c', 'cbqri_bandwidth.c'))
 
 hw_arch += {'riscv': riscv_ss}