| Message ID | 20230424144712.1985425-3-harshpb@linux.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | Cleanup [h_enter|spapr_exit]_nested routines | expand |
On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: > h_enter_nested() currently does a lot of register specific operations > which should be abstracted logically to simplify the code for better > readability. This patch breaks down relevant blocks into respective > helper routines to make use of them for better readability/maintenance. > > Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> > --- > hw/ppc/spapr_hcall.c | 117 ++++++++++++++++++++++++++++--------------- > 1 file changed, 78 insertions(+), 39 deletions(-) > > diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c > index 124cee5e53..f24d4b368e 100644 > --- a/hw/ppc/spapr_hcall.c > +++ b/hw/ppc/spapr_hcall.c > @@ -1544,6 +1544,81 @@ static target_ulong h_copy_tofrom_guest(PowerPCCPU *cpu, > return H_FUNCTION; > } > > +static void restore_hdec_from_hvstate(CPUPPCState *dst, > + struct kvmppc_hv_guest_state *hv_state, > + target_ulong now) > +{ > + target_ulong hdec; > + > + assert(hv_state); > + hdec = hv_state->hdec_expiry - now; > + cpu_ppc_hdecr_init(dst); > + cpu_ppc_store_hdecr(dst, hdec); > +} > + > +static void restore_lpcr_from_hvstate(PowerPCCPU *cpu, > + struct kvmppc_hv_guest_state *hv_state) > +{ > + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > + CPUPPCState *dst = &cpu->env; > + target_ulong lpcr, lpcr_mask; > + > + assert(hv_state); > + lpcr_mask = LPCR_DPFD | LPCR_ILE | LPCR_AIL | LPCR_LD | LPCR_MER; > + lpcr = (dst->spr[SPR_LPCR] & ~lpcr_mask) | (hv_state->lpcr & lpcr_mask); > + lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; > + lpcr &= ~LPCR_LPES0; > + dst->spr[SPR_LPCR] = lpcr & pcc->lpcr_mask; > +} > + > +static void restore_env_from_ptregs(CPUPPCState *env, > + struct kvmppc_pt_regs *regs) > +{ > + assert(env); > + assert(regs); > + assert(sizeof(env->gpr) == sizeof(regs->gpr)); > + memcpy(env->gpr, regs->gpr, sizeof(env->gpr)); > + env->nip = regs->nip; > + env->msr = regs->msr; > + env->lr = regs->link; > + env->ctr = regs->ctr; > + cpu_write_xer(env, regs->xer); > + ppc_store_cr(env, regs->ccr); > +} > + > +static void restore_env_from_hvstate(CPUPPCState *env, > + struct kvmppc_hv_guest_state *hv_state) > +{ > + assert(env); > + assert(hv_state); > + env->spr[SPR_HFSCR] = hv_state->hfscr; > + /* TCG does not implement DAWR*, CIABR, PURR, SPURR, IC, VTB, HEIR SPRs*/ > + env->cfar = hv_state->cfar; > + env->spr[SPR_PCR] = hv_state->pcr; > + env->spr[SPR_DPDES] = hv_state->dpdes; > + env->spr[SPR_SRR0] = hv_state->srr0; > + env->spr[SPR_SRR1] = hv_state->srr1; > + env->spr[SPR_SPRG0] = hv_state->sprg[0]; > + env->spr[SPR_SPRG1] = hv_state->sprg[1]; > + env->spr[SPR_SPRG2] = hv_state->sprg[2]; > + env->spr[SPR_SPRG3] = hv_state->sprg[3]; > + env->spr[SPR_BOOKS_PID] = hv_state->pidr; > + env->spr[SPR_PPR] = hv_state->ppr; > +} > + > +static inline void restore_l2_env(PowerPCCPU *cpu, > + struct kvmppc_hv_guest_state *hv_state, > + struct kvmppc_pt_regs *regs, > + target_ulong now) > +{ > + CPUPPCState *env = &cpu->env; > + > + restore_env_from_ptregs(env, regs); > + restore_env_from_hvstate(env, hv_state); > + restore_lpcr_from_hvstate(cpu, hv_state); > + restore_hdec_from_hvstate(env, hv_state, now); > +} > + > /* > * When this handler returns, the environment is switched to the L2 guest > * and TCG begins running that. spapr_exit_nested() performs the switch from > @@ -1554,14 +1629,12 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, > target_ulong opcode, > target_ulong *args) > { > - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); > CPUState *cs = CPU(cpu); > CPUPPCState *env = &cpu->env; > SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); > target_ulong hv_ptr = args[0]; > target_ulong regs_ptr = args[1]; > - target_ulong hdec, now = cpu_ppc_load_tbl(env); > - target_ulong lpcr, lpcr_mask; > + target_ulong now = cpu_ppc_load_tbl(env); > struct kvmppc_hv_guest_state *hvstate; > struct kvmppc_hv_guest_state hv_state; > struct kvmppc_pt_regs *regs; > @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, > return H_P2; > } > > - len = sizeof(env->gpr); > - assert(len == sizeof(regs->gpr)); > - memcpy(env->gpr, regs->gpr, len); > - > - env->lr = regs->link; > - env->ctr = regs->ctr; > - cpu_write_xer(env, regs->xer); > - ppc_store_cr(env, regs->ccr); > - > - env->msr = regs->msr; > - env->nip = regs->nip; > + /* restore L2 env from hv_state and ptregs */ > + restore_l2_env(cpu, &hv_state, regs, now); > > address_space_unmap(CPU(cpu)->as, regs, len, len, false); I don't agree this improves readability. It also does more with the guest address space mapped, which may not be a big deal is strictly not an improvement. The comment needn't just repeat what the function says, and it does not actually restore the l2 environment. It sets some registers to L2 values, but it also leaves other state. I would like to see this in a larger series if it's going somewhere, but at the moment I'd rather leave it as is. Thanks, Nick
On 5/2/23 10:19, Nicholas Piggin wrote: > On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: >> h_enter_nested() currently does a lot of register specific operations >> which should be abstracted logically to simplify the code for better >> readability. This patch breaks down relevant blocks into respective >> helper routines to make use of them for better readability/maintenance. >> >> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> >> --- >> hw/ppc/spapr_hcall.c | 117 ++++++++++++++++++++++++++++--------------- >> 1 file changed, 78 insertions(+), 39 deletions(-) >> >> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c >> index 124cee5e53..f24d4b368e 100644 >> --- a/hw/ppc/spapr_hcall.c >> +++ b/hw/ppc/spapr_hcall.c >> @@ -1544,6 +1544,81 @@ static target_ulong h_copy_tofrom_guest(PowerPCCPU *cpu, >> return H_FUNCTION; >> } >> >> +static void restore_hdec_from_hvstate(CPUPPCState *dst, >> + struct kvmppc_hv_guest_state *hv_state, >> + target_ulong now) >> +{ >> + target_ulong hdec; >> + >> + assert(hv_state); >> + hdec = hv_state->hdec_expiry - now; >> + cpu_ppc_hdecr_init(dst); >> + cpu_ppc_store_hdecr(dst, hdec); >> +} >> + >> +static void restore_lpcr_from_hvstate(PowerPCCPU *cpu, >> + struct kvmppc_hv_guest_state *hv_state) >> +{ >> + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); >> + CPUPPCState *dst = &cpu->env; >> + target_ulong lpcr, lpcr_mask; >> + >> + assert(hv_state); >> + lpcr_mask = LPCR_DPFD | LPCR_ILE | LPCR_AIL | LPCR_LD | LPCR_MER; >> + lpcr = (dst->spr[SPR_LPCR] & ~lpcr_mask) | (hv_state->lpcr & lpcr_mask); >> + lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; >> + lpcr &= ~LPCR_LPES0; >> + dst->spr[SPR_LPCR] = lpcr & pcc->lpcr_mask; >> +} >> + >> +static void restore_env_from_ptregs(CPUPPCState *env, >> + struct kvmppc_pt_regs *regs) >> +{ >> + assert(env); >> + assert(regs); >> + assert(sizeof(env->gpr) == sizeof(regs->gpr)); >> + memcpy(env->gpr, regs->gpr, sizeof(env->gpr)); >> + env->nip = regs->nip; >> + env->msr = regs->msr; >> + env->lr = regs->link; >> + env->ctr = regs->ctr; >> + cpu_write_xer(env, regs->xer); >> + ppc_store_cr(env, regs->ccr); >> +} >> + >> +static void restore_env_from_hvstate(CPUPPCState *env, >> + struct kvmppc_hv_guest_state *hv_state) >> +{ >> + assert(env); >> + assert(hv_state); >> + env->spr[SPR_HFSCR] = hv_state->hfscr; >> + /* TCG does not implement DAWR*, CIABR, PURR, SPURR, IC, VTB, HEIR SPRs*/ >> + env->cfar = hv_state->cfar; >> + env->spr[SPR_PCR] = hv_state->pcr; >> + env->spr[SPR_DPDES] = hv_state->dpdes; >> + env->spr[SPR_SRR0] = hv_state->srr0; >> + env->spr[SPR_SRR1] = hv_state->srr1; >> + env->spr[SPR_SPRG0] = hv_state->sprg[0]; >> + env->spr[SPR_SPRG1] = hv_state->sprg[1]; >> + env->spr[SPR_SPRG2] = hv_state->sprg[2]; >> + env->spr[SPR_SPRG3] = hv_state->sprg[3]; >> + env->spr[SPR_BOOKS_PID] = hv_state->pidr; >> + env->spr[SPR_PPR] = hv_state->ppr; >> +} >> + >> +static inline void restore_l2_env(PowerPCCPU *cpu, >> + struct kvmppc_hv_guest_state *hv_state, >> + struct kvmppc_pt_regs *regs, >> + target_ulong now) >> +{ >> + CPUPPCState *env = &cpu->env; >> + >> + restore_env_from_ptregs(env, regs); >> + restore_env_from_hvstate(env, hv_state); >> + restore_lpcr_from_hvstate(cpu, hv_state); >> + restore_hdec_from_hvstate(env, hv_state, now); >> +} >> + >> /* >> * When this handler returns, the environment is switched to the L2 guest >> * and TCG begins running that. spapr_exit_nested() performs the switch from >> @@ -1554,14 +1629,12 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, >> target_ulong opcode, >> target_ulong *args) >> { >> - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); >> CPUState *cs = CPU(cpu); >> CPUPPCState *env = &cpu->env; >> SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); >> target_ulong hv_ptr = args[0]; >> target_ulong regs_ptr = args[1]; >> - target_ulong hdec, now = cpu_ppc_load_tbl(env); >> - target_ulong lpcr, lpcr_mask; >> + target_ulong now = cpu_ppc_load_tbl(env); >> struct kvmppc_hv_guest_state *hvstate; >> struct kvmppc_hv_guest_state hv_state; >> struct kvmppc_pt_regs *regs; >> @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, >> return H_P2; >> } >> >> - len = sizeof(env->gpr); >> - assert(len == sizeof(regs->gpr)); >> - memcpy(env->gpr, regs->gpr, len); >> - >> - env->lr = regs->link; >> - env->ctr = regs->ctr; >> - cpu_write_xer(env, regs->xer); >> - ppc_store_cr(env, regs->ccr); >> - >> - env->msr = regs->msr; >> - env->nip = regs->nip; >> + /* restore L2 env from hv_state and ptregs */ >> + restore_l2_env(cpu, &hv_state, regs, now); >> >> address_space_unmap(CPU(cpu)->as, regs, len, len, false); > > I don't agree this improves readability. It also does more with the > guest address space mapped, which may not be a big deal is strictly > not an improvement. > > The comment needn't just repeat what the function says, and it does > not actually restore the l2 environment. It sets some registers to > L2 values, but it also leaves other state. > > I would like to see this in a larger series if it's going somewhere, > but at the moment I'd rather leave it as is. > While I agree the routine could be named restore_l2_hvstate_ptregs() as more appropriate, I think it still makes sense to have the body of enter/exit routines with as minimum LOC as possible, with the help of minimum helper routines possible. Giving semantics to the set of operations related to ptregs/hvstate register load/store is the first step towards it. As you have guessed, this is certainly a precursor to another API version that we have been working on (still a WIP), and helps isolating the code flows for backward compatibiility. Having such changes early upstream helps stablising changes which are not a really a API/design change. regards, Harsh > Thanks, > Nick
On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote: > On 5/2/23 10:19, Nicholas Piggin wrote: > > On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: > >> @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, > >> return H_P2; > >> } > >> > >> - len = sizeof(env->gpr); > >> - assert(len == sizeof(regs->gpr)); > >> - memcpy(env->gpr, regs->gpr, len); > >> - > >> - env->lr = regs->link; > >> - env->ctr = regs->ctr; > >> - cpu_write_xer(env, regs->xer); > >> - ppc_store_cr(env, regs->ccr); > >> - > >> - env->msr = regs->msr; > >> - env->nip = regs->nip; > >> + /* restore L2 env from hv_state and ptregs */ > >> + restore_l2_env(cpu, &hv_state, regs, now); > >> > >> address_space_unmap(CPU(cpu)->as, regs, len, len, false); > > > > I don't agree this improves readability. It also does more with the > > guest address space mapped, which may not be a big deal is strictly > > not an improvement. > > > > The comment needn't just repeat what the function says, and it does > > not actually restore the l2 environment. It sets some registers to > > L2 values, but it also leaves other state. > > > > I would like to see this in a larger series if it's going somewhere, > > but at the moment I'd rather leave it as is. > > > While I agree the routine could be named restore_l2_hvstate_ptregs() as > more appropriate, I think it still makes sense to have the body of > enter/exit routines with as minimum LOC as possible, with the help of > minimum helper routines possible. I don't think that's a good goal. The entirity of entering and exiting from a nested guest is 279 lines including comments and no more than one level of control flow. It's tricky code and has worts, but not because the number of lines. > Giving semantics to the set of > operations related to ptregs/hvstate register load/store is the first > step towards it. Those structures are entirely the domain of the hcall API though, so if anything belongs in the handler functions it is the handling of those IMO. > As you have guessed, this is certainly a precursor to another API > version that we have been working on (still a WIP), and helps isolating > the code flows for backward compatibiility. Having such changes early > upstream helps stablising changes which are not a really a API/design > change. Right. Some more abstracting could certainly make sense here, I just think at this point we need to see the bigger picture. Thanks, Nick
On 5/2/23 12:11, Nicholas Piggin wrote: > On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote: >> On 5/2/23 10:19, Nicholas Piggin wrote: >>> On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: >>>> @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, >>>> return H_P2; >>>> } >>>> >>>> - len = sizeof(env->gpr); >>>> - assert(len == sizeof(regs->gpr)); >>>> - memcpy(env->gpr, regs->gpr, len); >>>> - >>>> - env->lr = regs->link; >>>> - env->ctr = regs->ctr; >>>> - cpu_write_xer(env, regs->xer); >>>> - ppc_store_cr(env, regs->ccr); >>>> - >>>> - env->msr = regs->msr; >>>> - env->nip = regs->nip; >>>> + /* restore L2 env from hv_state and ptregs */ >>>> + restore_l2_env(cpu, &hv_state, regs, now); >>>> >>>> address_space_unmap(CPU(cpu)->as, regs, len, len, false); >>> >>> I don't agree this improves readability. It also does more with the >>> guest address space mapped, which may not be a big deal is strictly >>> not an improvement. >>> >>> The comment needn't just repeat what the function says, and it does >>> not actually restore the l2 environment. It sets some registers to >>> L2 values, but it also leaves other state. >>> >>> I would like to see this in a larger series if it's going somewhere, >>> but at the moment I'd rather leave it as is. >>> >> While I agree the routine could be named restore_l2_hvstate_ptregs() as >> more appropriate, I think it still makes sense to have the body of >> enter/exit routines with as minimum LOC as possible, with the help of >> minimum helper routines possible. > > I don't think that's a good goal. The entirity of entering and exiting > from a nested guest is 279 lines including comments and no more than > one level of control flow. It's tricky code and has worts, but not > because the number of lines. > Yes, It's a tricky code, and this patch was an attempt to simplify the tricky-ness by giving names to set of related ops with helper routines. >> Giving semantics to the set of >> operations related to ptregs/hvstate register load/store is the first >> step towards it. > > Those structures are entirely the domain of the hcall API though, so > if anything belongs in the handler functions it is the handling of > those IMO. > Absolutely, ideally we would want to contain everything inside the handler, but if a logical name could be given to a set of related ops (ptregs/hvstate specific), that certainly helps the reader to look into bigger picture at first and then get into specific details as needed. >> As you have guessed, this is certainly a precursor to another API >> version that we have been working on (still a WIP), and helps isolating >> the code flows for backward compatibiility. Having such changes early >> upstream helps stablising changes which are not a really a API/design >> change. > > Right. Some more abstracting could certainly make sense here, I just > think at this point we need to see the bigger picture. I think I am fine holding the cleanup for enter/exit nested for now until we bring the next set of API changes upstream, as that will provide a better context to the value these changes would bring along. Meanwhile, I shall address your comments on 1/4 and post a v3. Thanks for all your review inputs. regards, Harsh > > Thanks, > Nick >
On Tue May 2, 2023 at 5:36 PM AEST, Harsh Prateek Bora wrote: > > > On 5/2/23 12:11, Nicholas Piggin wrote: > > On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote: > >> On 5/2/23 10:19, Nicholas Piggin wrote: > >>> On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: > >>>> @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, > >>>> return H_P2; > >>>> } > >>>> > >>>> - len = sizeof(env->gpr); > >>>> - assert(len == sizeof(regs->gpr)); > >>>> - memcpy(env->gpr, regs->gpr, len); > >>>> - > >>>> - env->lr = regs->link; > >>>> - env->ctr = regs->ctr; > >>>> - cpu_write_xer(env, regs->xer); > >>>> - ppc_store_cr(env, regs->ccr); > >>>> - > >>>> - env->msr = regs->msr; > >>>> - env->nip = regs->nip; > >>>> + /* restore L2 env from hv_state and ptregs */ > >>>> + restore_l2_env(cpu, &hv_state, regs, now); > >>>> > >>>> address_space_unmap(CPU(cpu)->as, regs, len, len, false); > >>> > >>> I don't agree this improves readability. It also does more with the > >>> guest address space mapped, which may not be a big deal is strictly > >>> not an improvement. > >>> > >>> The comment needn't just repeat what the function says, and it does > >>> not actually restore the l2 environment. It sets some registers to > >>> L2 values, but it also leaves other state. > >>> > >>> I would like to see this in a larger series if it's going somewhere, > >>> but at the moment I'd rather leave it as is. > >>> > >> While I agree the routine could be named restore_l2_hvstate_ptregs() as > >> more appropriate, I think it still makes sense to have the body of > >> enter/exit routines with as minimum LOC as possible, with the help of > >> minimum helper routines possible. > > > > I don't think that's a good goal. The entirity of entering and exiting > > from a nested guest is 279 lines including comments and no more than > > one level of control flow. It's tricky code and has worts, but not > > because the number of lines. > > > Yes, It's a tricky code, and this patch was an attempt to simplify the > tricky-ness by giving names to set of related ops with helper routines. The H_ENTER_NESTED hcall says "here are a bunch of registers, set the environment to that and switch to the L2 guest. So having a long list of registers may be a bit tedious but it's at the same level of abstraction as the call itself. Nothing really wrong with it. And you have to put that somewhere. It can help to read tricky logic by factoring out something, but in this case the entire hcall just about is switching state, so switch_some_state(); ... switch other state ... Isn't *necessarily* an improvement over ... switch some state... ... switch other state... There is no complicated logic around enter/exit, so there's really no additional clarity you get by being able to abstract some of it. The difficult part is how switching that state is entirely what causes the hcall interrupt to return to the L2 guest. > >> Giving semantics to the set of > >> operations related to ptregs/hvstate register load/store is the first > >> step towards it. > > > > Those structures are entirely the domain of the hcall API though, so > > if anything belongs in the handler functions it is the handling of > > those IMO. > > > Absolutely, ideally we would want to contain everything inside the > handler, but if a logical name could be given to a set of related ops > (ptregs/hvstate specific), that certainly helps the reader to look into > bigger picture at first and then get into specific details as needed. But those related ops don't necesarily make sense to pull out like this, because they are tied to the API. So depending on what the bigger series is, it might not make sense. If you are to add another hcall API for nested HV, then I would say it's probably wrong. What you want to abstract is the switching between L1 and L2, not moving register values in and out of the hcall structs. > >> As you have guessed, this is certainly a precursor to another API > >> version that we have been working on (still a WIP), and helps isolating > >> the code flows for backward compatibiility. Having such changes early > >> upstream helps stablising changes which are not a really a API/design > >> change. > > > > Right. Some more abstracting could certainly make sense here, I just > > think at this point we need to see the bigger picture. > > I think I am fine holding the cleanup for enter/exit nested for now > until we bring the next set of API changes upstream, as that will > provide a better context to the value these changes would bring along. > > Meanwhile, I shall address your comments on 1/4 and post a v3. > Thanks for all your review inputs. Sounds good. Thanks, Nick
On 5/2/23 14:09, Nicholas Piggin wrote: > On Tue May 2, 2023 at 5:36 PM AEST, Harsh Prateek Bora wrote: >> >> >> On 5/2/23 12:11, Nicholas Piggin wrote: >>> On Tue May 2, 2023 at 4:13 PM AEST, Harsh Prateek Bora wrote: >>>> On 5/2/23 10:19, Nicholas Piggin wrote: >>>>> On Tue Apr 25, 2023 at 12:47 AM AEST, Harsh Prateek Bora wrote: >>>>>> @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, >>>>>> return H_P2; >>>>>> } >>>>>> >>>>>> - len = sizeof(env->gpr); >>>>>> - assert(len == sizeof(regs->gpr)); >>>>>> - memcpy(env->gpr, regs->gpr, len); >>>>>> - >>>>>> - env->lr = regs->link; >>>>>> - env->ctr = regs->ctr; >>>>>> - cpu_write_xer(env, regs->xer); >>>>>> - ppc_store_cr(env, regs->ccr); >>>>>> - >>>>>> - env->msr = regs->msr; >>>>>> - env->nip = regs->nip; >>>>>> + /* restore L2 env from hv_state and ptregs */ >>>>>> + restore_l2_env(cpu, &hv_state, regs, now); >>>>>> >>>>>> address_space_unmap(CPU(cpu)->as, regs, len, len, false); >>>>> >>>>> I don't agree this improves readability. It also does more with the >>>>> guest address space mapped, which may not be a big deal is strictly >>>>> not an improvement. >>>>> >>>>> The comment needn't just repeat what the function says, and it does >>>>> not actually restore the l2 environment. It sets some registers to >>>>> L2 values, but it also leaves other state. >>>>> >>>>> I would like to see this in a larger series if it's going somewhere, >>>>> but at the moment I'd rather leave it as is. >>>>> >>>> While I agree the routine could be named restore_l2_hvstate_ptregs() as >>>> more appropriate, I think it still makes sense to have the body of >>>> enter/exit routines with as minimum LOC as possible, with the help of >>>> minimum helper routines possible. >>> >>> I don't think that's a good goal. The entirity of entering and exiting >>> from a nested guest is 279 lines including comments and no more than >>> one level of control flow. It's tricky code and has worts, but not >>> because the number of lines. >>> >> Yes, It's a tricky code, and this patch was an attempt to simplify the >> tricky-ness by giving names to set of related ops with helper routines. > > The H_ENTER_NESTED hcall says "here are a bunch of registers, set the > environment to that and switch to the L2 guest. > > So having a long list of registers may be a bit tedious but it's at the > same level of abstraction as the call itself. Nothing really wrong with > it. And you have to put that somewhere. > > It can help to read tricky logic by factoring out something, but in this > case the entire hcall just about is switching state, so > > switch_some_state(); > ... switch other state ... > > Isn't *necessarily* an improvement over > > ... switch some state... > ... switch other state... > > There is no complicated logic around enter/exit, so there's really no > additional clarity you get by being able to abstract some of it. The > difficult part is how switching that state is entirely what causes the > hcall interrupt to return to the L2 guest. > I think the cleanup may look more appropriate when we have the new incoming changes in the same set of enter/exit routines, to ensure it doesn't look bloated then. >>>> Giving semantics to the set of >>>> operations related to ptregs/hvstate register load/store is the first >>>> step towards it. >>> >>> Those structures are entirely the domain of the hcall API though, so >>> if anything belongs in the handler functions it is the handling of >>> those IMO. >>> >> Absolutely, ideally we would want to contain everything inside the >> handler, but if a logical name could be given to a set of related ops >> (ptregs/hvstate specific), that certainly helps the reader to look into >> bigger picture at first and then get into specific details as needed. > > But those related ops don't necesarily make sense to pull out like this, > because they are tied to the API. So depending on what the bigger series > is, it might not make sense. If you are to add another hcall API for > nested HV, then I would say it's probably wrong. What you want to > abstract is the switching between L1 and L2, not moving register values > in and out of the hcall structs. > There will be a set of new hcalls (to provide more capabilities) and it does reuse most of the existing logic/code in enter/exit path as well. As suggested, focus of cleanup shall remain on abstracting the switching between L1/L2 for common routines. We can discuss more later when we have the newer API changes ready for upstream. >>>> As you have guessed, this is certainly a precursor to another API >>>> version that we have been working on (still a WIP), and helps isolating >>>> the code flows for backward compatibiility. Having such changes early >>>> upstream helps stablising changes which are not a really a API/design >>>> change. >>> >>> Right. Some more abstracting could certainly make sense here, I just >>> think at this point we need to see the bigger picture. >> >> I think I am fine holding the cleanup for enter/exit nested for now >> until we bring the next set of API changes upstream, as that will >> provide a better context to the value these changes would bring along. >> >> Meanwhile, I shall address your comments on 1/4 and post a v3. >> Thanks for all your review inputs. > > Sounds good. Thanks Harsh > > Thanks, > Nick
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 124cee5e53..f24d4b368e 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1544,6 +1544,81 @@ static target_ulong h_copy_tofrom_guest(PowerPCCPU *cpu, return H_FUNCTION; } +static void restore_hdec_from_hvstate(CPUPPCState *dst, + struct kvmppc_hv_guest_state *hv_state, + target_ulong now) +{ + target_ulong hdec; + + assert(hv_state); + hdec = hv_state->hdec_expiry - now; + cpu_ppc_hdecr_init(dst); + cpu_ppc_store_hdecr(dst, hdec); +} + +static void restore_lpcr_from_hvstate(PowerPCCPU *cpu, + struct kvmppc_hv_guest_state *hv_state) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *dst = &cpu->env; + target_ulong lpcr, lpcr_mask; + + assert(hv_state); + lpcr_mask = LPCR_DPFD | LPCR_ILE | LPCR_AIL | LPCR_LD | LPCR_MER; + lpcr = (dst->spr[SPR_LPCR] & ~lpcr_mask) | (hv_state->lpcr & lpcr_mask); + lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; + lpcr &= ~LPCR_LPES0; + dst->spr[SPR_LPCR] = lpcr & pcc->lpcr_mask; +} + +static void restore_env_from_ptregs(CPUPPCState *env, + struct kvmppc_pt_regs *regs) +{ + assert(env); + assert(regs); + assert(sizeof(env->gpr) == sizeof(regs->gpr)); + memcpy(env->gpr, regs->gpr, sizeof(env->gpr)); + env->nip = regs->nip; + env->msr = regs->msr; + env->lr = regs->link; + env->ctr = regs->ctr; + cpu_write_xer(env, regs->xer); + ppc_store_cr(env, regs->ccr); +} + +static void restore_env_from_hvstate(CPUPPCState *env, + struct kvmppc_hv_guest_state *hv_state) +{ + assert(env); + assert(hv_state); + env->spr[SPR_HFSCR] = hv_state->hfscr; + /* TCG does not implement DAWR*, CIABR, PURR, SPURR, IC, VTB, HEIR SPRs*/ + env->cfar = hv_state->cfar; + env->spr[SPR_PCR] = hv_state->pcr; + env->spr[SPR_DPDES] = hv_state->dpdes; + env->spr[SPR_SRR0] = hv_state->srr0; + env->spr[SPR_SRR1] = hv_state->srr1; + env->spr[SPR_SPRG0] = hv_state->sprg[0]; + env->spr[SPR_SPRG1] = hv_state->sprg[1]; + env->spr[SPR_SPRG2] = hv_state->sprg[2]; + env->spr[SPR_SPRG3] = hv_state->sprg[3]; + env->spr[SPR_BOOKS_PID] = hv_state->pidr; + env->spr[SPR_PPR] = hv_state->ppr; +} + +static inline void restore_l2_env(PowerPCCPU *cpu, + struct kvmppc_hv_guest_state *hv_state, + struct kvmppc_pt_regs *regs, + target_ulong now) +{ + CPUPPCState *env = &cpu->env; + + restore_env_from_ptregs(env, regs); + restore_env_from_hvstate(env, hv_state); + restore_lpcr_from_hvstate(cpu, hv_state); + restore_hdec_from_hvstate(env, hv_state, now); +} + /* * When this handler returns, the environment is switched to the L2 guest * and TCG begins running that. spapr_exit_nested() performs the switch from @@ -1554,14 +1629,12 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, target_ulong opcode, target_ulong *args) { - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu); target_ulong hv_ptr = args[0]; target_ulong regs_ptr = args[1]; - target_ulong hdec, now = cpu_ppc_load_tbl(env); - target_ulong lpcr, lpcr_mask; + target_ulong now = cpu_ppc_load_tbl(env); struct kvmppc_hv_guest_state *hvstate; struct kvmppc_hv_guest_state hv_state; struct kvmppc_pt_regs *regs; @@ -1607,49 +1680,15 @@ static target_ulong h_enter_nested(PowerPCCPU *cpu, return H_P2; } - len = sizeof(env->gpr); - assert(len == sizeof(regs->gpr)); - memcpy(env->gpr, regs->gpr, len); - - env->lr = regs->link; - env->ctr = regs->ctr; - cpu_write_xer(env, regs->xer); - ppc_store_cr(env, regs->ccr); - - env->msr = regs->msr; - env->nip = regs->nip; + /* restore L2 env from hv_state and ptregs */ + restore_l2_env(cpu, &hv_state, regs, now); address_space_unmap(CPU(cpu)->as, regs, len, len, false); - env->cfar = hv_state.cfar; - assert(env->spr[SPR_LPIDR] == 0); env->spr[SPR_LPIDR] = hv_state.lpid; - lpcr_mask = LPCR_DPFD | LPCR_ILE | LPCR_AIL | LPCR_LD | LPCR_MER; - lpcr = (env->spr[SPR_LPCR] & ~lpcr_mask) | (hv_state.lpcr & lpcr_mask); - lpcr |= LPCR_HR | LPCR_UPRT | LPCR_GTSE | LPCR_HVICE | LPCR_HDICE; - lpcr &= ~LPCR_LPES0; - env->spr[SPR_LPCR] = lpcr & pcc->lpcr_mask; - - env->spr[SPR_PCR] = hv_state.pcr; - /* hv_state.amor is not used */ - env->spr[SPR_DPDES] = hv_state.dpdes; - env->spr[SPR_HFSCR] = hv_state.hfscr; - hdec = hv_state.hdec_expiry - now; spapr_cpu->nested_tb_offset = hv_state.tb_offset; - /* TCG does not implement DAWR*, CIABR, PURR, SPURR, IC, VTB, HEIR SPRs*/ - env->spr[SPR_SRR0] = hv_state.srr0; - env->spr[SPR_SRR1] = hv_state.srr1; - env->spr[SPR_SPRG0] = hv_state.sprg[0]; - env->spr[SPR_SPRG1] = hv_state.sprg[1]; - env->spr[SPR_SPRG2] = hv_state.sprg[2]; - env->spr[SPR_SPRG3] = hv_state.sprg[3]; - env->spr[SPR_BOOKS_PID] = hv_state.pidr; - env->spr[SPR_PPR] = hv_state.ppr; - - cpu_ppc_hdecr_init(env); - cpu_ppc_store_hdecr(env, hdec); /* * The hv_state.vcpu_token is not needed. It is used by the KVM
h_enter_nested() currently does a lot of register specific operations which should be abstracted logically to simplify the code for better readability. This patch breaks down relevant blocks into respective helper routines to make use of them for better readability/maintenance. Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> --- hw/ppc/spapr_hcall.c | 117 ++++++++++++++++++++++++++++--------------- 1 file changed, 78 insertions(+), 39 deletions(-)