diff mbox series

[PULL,v2,05/10] Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_stores

Message ID 20230421164922.3608183-6-tsimpson@quicinc.com
State New
Headers show
Series [PULL,v2,01/10] Hexagon (translate.c): avoid redundant PC updates on COF | expand

Commit Message

Taylor Simpson April 21, 2023, 4:49 p.m. UTC 
Reducing the number of arguments reduces the overhead of the helper
call

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230405164211.30015-2-tsimpson@quicinc.com>
---
 target/hexagon/helper.h    |  4 ++--
 target/hexagon/translate.h |  1 +
 target/hexagon/op_helper.c |  4 ++--
 target/hexagon/translate.c | 10 +++++-----
 4 files changed, 10 insertions(+), 9 deletions(-)
diff mbox series

Patch

diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h
index 368f0b5708..ed7f9842f6 100644
--- a/target/hexagon/helper.h
+++ b/target/hexagon/helper.h
@@ -1,5 +1,5 @@ 
 /*
- *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *  Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
@@ -107,4 +107,4 @@  DEF_HELPER_2(vwhist128qm, void, env, s32)
 DEF_HELPER_4(probe_noshuf_load, void, env, i32, int, int)
 DEF_HELPER_2(probe_pkt_scalar_store_s0, void, env, int)
 DEF_HELPER_2(probe_hvx_stores, void, env, int)
-DEF_HELPER_3(probe_pkt_scalar_hvx_stores, void, env, int, int)
+DEF_HELPER_2(probe_pkt_scalar_hvx_stores, void, env, int)
diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h
index db832b0f88..4b9f21c41d 100644
--- a/target/hexagon/translate.h
+++ b/target/hexagon/translate.h
@@ -178,5 +178,6 @@  FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1,        1, 1)
 FIELD(PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES, 2, 1)
 FIELD(PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED,     3, 1)
 FIELD(PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED,     4, 1)
+FIELD(PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX,        5, 2)
 
 #endif
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index c9a156030e..099c111a8c 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -488,8 +488,7 @@  void HELPER(probe_hvx_stores)(CPUHexagonState *env, int mmu_idx)
     }
 }
 
-void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
-                                         int mmu_idx)
+void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask)
 {
     bool has_st0 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST0);
     bool has_st1 = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_ST1);
@@ -497,6 +496,7 @@  void HELPER(probe_pkt_scalar_hvx_stores)(CPUHexagonState *env, int mask,
         FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, HAS_HVX_STORES);
     bool s0_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S0_IS_PRED);
     bool s1_is_pred = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, S1_IS_PRED);
+    int mmu_idx = FIELD_EX32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX);
 
     if (has_st0) {
         probe_store(env, 0, mmu_idx, s0_is_pred);
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index 58d638f734..c087f183d0 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -808,13 +808,11 @@  static void gen_commit_packet(DisasContext *ctx)
         g_assert(!has_store_s1 && !has_hvx_store);
         process_dczeroa(ctx);
     } else if (has_hvx_store) {
-        TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
-
         if (!has_store_s0 && !has_store_s1) {
+            TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
             gen_helper_probe_hvx_stores(cpu_env, mem_idx);
         } else {
             int mask = 0;
-            TCGv mask_tcgv;
 
             if (has_store_s0) {
                 mask =
@@ -839,8 +837,10 @@  static void gen_commit_packet(DisasContext *ctx)
                     FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES,
                                S1_IS_PRED, 1);
             }
-            mask_tcgv = tcg_constant_tl(mask);
-            gen_helper_probe_pkt_scalar_hvx_stores(cpu_env, mask_tcgv, mem_idx);
+            mask = FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX,
+                              ctx->mem_idx);
+            gen_helper_probe_pkt_scalar_hvx_stores(cpu_env,
+                                                   tcg_constant_tl(mask));
         }
     } else if (has_store_s0 && has_store_s1) {
         /*