Message ID | 20230324123809.107714-2-liweiwei@iscas.ac.cn |
---|---|
State | New |
Headers | show |
Series | target/riscv: Simplification for RVH related check and code style fix | expand |
On 3/24/23 05:38, Weiwei Li wrote: > The assignment is done under the condition riscv_cpu_virt_enabled()=true. > > Signed-off-by: Weiwei Li<liweiwei@iscas.ac.cn> > Signed-off-by: Junqiang Wang<wangjunqiang@iscas.ac.cn> > --- > target/riscv/cpu_helper.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 824f0cbd92..e140d6a8d0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -1706,9 +1706,7 @@ void riscv_cpu_do_interrupt(CPUState *cs) riscv_cpu_swap_hypervisor_regs(env); env->hstatus = set_field(env->hstatus, HSTATUS_SPVP, env->priv); - env->hstatus = set_field(env->hstatus, HSTATUS_SPV, - riscv_cpu_virt_enabled(env)); - + env->hstatus = set_field(env->hstatus, HSTATUS_SPV, true); htval = env->guest_phys_fault_addr;