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Tue, 14 Mar 2023 11:00:35 GMT Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 34BC420040; Tue, 14 Mar 2023 11:00:35 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A1B842004B; Tue, 14 Mar 2023 11:00:34 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.57.117]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Tue, 14 Mar 2023 11:00:34 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand , Thomas Huth Cc: qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 1/2] target/s390x: Implement Early Exception Recognition Date: Tue, 14 Mar 2023 12:00:21 +0100 Message-Id: <20230314110022.184717-2-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230314110022.184717-1-iii@linux.ibm.com> References: <20230314110022.184717-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: YyyQmgesrY7E6iVXn4HbM6CkOW17YGHa X-Proofpoint-GUID: hKNVQxSoRIe3OoQZCKBept4hLBKupeQ3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-14_04,2023-03-14_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 suspectscore=0 adultscore=0 phishscore=0 bulkscore=0 mlxscore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303140095 Received-SPF: pass client-ip=148.163.156.1; envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Generate specification exception if a reserved bit is set in the PSW mask or if the PSW address is out of bounds dictated by the addresing mode. Reported-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson Reviewed-by: David Hildenbrand --- target/s390x/cpu.c | 26 ++++++++++++++++++++++++++ target/s390x/cpu.h | 1 + target/s390x/tcg/excp_helper.c | 3 ++- 3 files changed, 29 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index b10a8541ff8..8e6e46aa3d8 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -41,6 +41,26 @@ #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; +#ifndef CONFIG_USER_ONLY +static bool is_early_exception_recognized(uint64_t mask, uint64_t addr) +{ + if (mask & PSW_MASK_RESERVED) { + return true; + } + + switch (mask & (PSW_MASK_32 | PSW_MASK_64)) { + case 0: + return addr & ~0xffffffULL; + case PSW_MASK_32: + return addr & ~0x7fffffffULL; + case PSW_MASK_32 | PSW_MASK_64: + return false; + default: /* PSW_MASK_64 */ + return true; + } +} +#endif + void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) { #ifndef CONFIG_USER_ONLY @@ -57,6 +77,12 @@ void s390_cpu_set_psw(CPUS390XState *env, uint64_t mask, uint64_t addr) env->cc_op = (mask >> 44) & 3; #ifndef CONFIG_USER_ONLY + if (is_early_exception_recognized(mask, addr)) { + env->int_pgm_ilen = 0; + trigger_pgm_exception(env, PGM_SPECIFICATION); + return; + } + if ((old_mask ^ mask) & PSW_MASK_PER) { s390_cpu_recompute_watchpoints(env_cpu(env)); } diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 7d6d01325b2..b4de6945936 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -292,6 +292,7 @@ extern const VMStateDescription vmstate_s390_cpu; #define PSW_MASK_32 0x0000000080000000ULL #define PSW_MASK_SHORT_ADDR 0x000000007fffffffULL #define PSW_MASK_SHORT_CTRL 0xffffffff80000000ULL +#define PSW_MASK_RESERVED 0xb800007e7fffffffULL #undef PSW_ASC_PRIMARY #undef PSW_ASC_ACCREG diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index bc767f04438..a7829b1e494 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -212,7 +212,8 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen = env->int_pgm_ilen; - assert(ilen == 2 || ilen == 4 || ilen == 6); + assert((env->int_pgm_code == PGM_SPECIFICATION && ilen == 0) || + ilen == 2 || ilen == 4 || ilen == 6); switch (env->int_pgm_code) { case PGM_PER: